Rainbow-electronics ATmega8515L Manual de usuario Pagina 130

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ATmega8515(L)
2512A–AVR–04/02
Data Modes Thereare fourcombinations ofSCKphaseandpolaritywithrespecttoserialdata,
which are determinedbycontrolbitsCPHAandCPOL.The SPIdata transferformats
are showninFigure 61andFigure 62. Data bits are shifted out andlatched in on oppo-
site edges of the SCK signal, ensuring sufficient time fordata signals to stabilize. This is
clearly seen by summarizing Table56 and Table57, asdone below:
Figure 61. SPI TransferFormat withCPHA = 0
Figure 62. SPI TransferFormat withCPHA = 1
Table 59. CPOL Functionality
Leading Edge Trailing Edge SPI Mode
CPOL=0,CPHA=0 Sample (Rising)Setup(Falling) 0
CPOL=0,CPHA=1 Setup(Rising)Sample (Falling) 1
CPOL=1,CPHA=0 Sample (Falling)Setup(Rising) 2
CPOL=1,CPHA=1 Setup(Falling)Sample (Rising)3
Bit 1
Bit 6
LSB
MSB
SCK (CPOL = 0)
mode 0
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 1)
mode 2
SS
MSB
LSB
Bit 6
Bit 1
Bit 5
Bit 2
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
MSB first (DORD = 0)
LSB first (DORD = 1)
SCK (CPOL = 0)
mode 1
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 1)
mode 3
SS
MSB
LSB
Bit 6
Bit 1
Bit 5
Bit 2
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
LSB
MSB
MSB first (DORD = 0)
LSB first (DORD = 1)
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