Rainbow-electronics ATmega8515L Manual de usuario Pagina 6

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ATmega8515(L)
2512A–AVR–04/02
About Code
Examples
Thisdocumentation containssimple codeexamples that briefly showhow to usevarious
parts of the device. These codeexamples assume that the part specificheaderfileis
includedbefore compilation. Beawarethat not all C Compiler vendors include bit defini-
tions in the headerfiles and interrupt handling in C iscompilerdependent. Please
confirm with the CCompilerdocumentation for more details.
AVR CPU Core
Introduction Thissection discusses the AVR corearchitectureingeneral.Themainfunction of the
CPUcoreis to ensure correct program execution. The CPU musttherefore beableto
access memories, perform calculations, controlperipherals, andhandleinterrupts.
Architectural Overview Figure 3. Block Diagram of theAVRArchitecture
Inorder to maximize performanceandparallelism, the AVR uses a Harvard architecture
withseparate memories andbusesforprogram anddata. Instructions in the program
memory areexecutedwith a single levelpipelining. Whileoneinstruction isbeing exe-
cuted, thenextinstruction ispre-fetchedfrom the program memory.Thisconcept
enables instructions to beexecuted in every clock cycle. The program memory isIn-
System reprogrammable Flash memory.
Flash
Program
Memory
Instruction
Register
Instruction
Decoder
Program
Counter
Control Lines
32x8
General
Purpose
Registrers
ALU
Status
and Control
I/O Lines
EEPROM
Data Bus 8-bit
Data
SRAM
Direct Addressing
Indirect Addressing
Interrupt
Unit
SPI
Unit
Watchdog
Timer
Analog
Comparator
I/O Module 2
I/O Module1
I/O Module n
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