
117
ATmega8515(L)
2512A–AVR–04/02
Note: 1. A specialcaseoccurs when OCR1A/OCR1B equals TOPandCOM1A1/COM1B1is
set. See “Phase CorrectPWM Mode” on page 110. for more details.
• Bit 3 – FOC1A: Force Output Compare for Channel A
• Bit 2 – FOC1B: Force Output Compare for Channel B
The FOC1A/FOC1Bbits areonly active when the WGM13:0 bitsspecifies a non-PWM
mode. However, for ensuring compatibilitywithfuture devices, these bits must be set to
zero when TCCR1A iswritten when operating in a PWM mode. When writing a logical
onetothe FOC1A/FOC1Bbit, an immediate comparematch isforced on the waveform
generation unit. The OC1A/OC1B output ischanged according to itsCOM1x1:0 bitsset-
ting. Note that the FOC1A/FOC1Bbits areimplemented asstrobes.Thereforeitis the
value present in the COM1x1:0 bits that determine theeffectof the forcedcompare.
A FOC1A/FOC1Bstrobe will not generate any interruptnorwill it clear thetimer in Clear
Timer on Compare Match (CTC) modeusing OCR1A as TOP.
The FOC1A/FOC1Bbits arealways read aszero.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combinedwith the WGM13:2 bitsfound in theTCCR1B Register, these bitscontrol the
counting sequenceof the counter, the source for maximum (TOP)counter value, and
what typeofwaveform generation to beused, see Table53. Modes of operation sup-
portedbytheTimer/Counter unit are:Normal mode (counter), Clear Timer on Compare
match (CTC) mode, and three types of Pulse WidthModulation (PWM) modes. See
“Modes ofOperation” on page 106.
Table 52. Compare Output Mode, Phase Correctand PhaseandFrequency Correct
PWM
(1)
COM1A1/
COM1B1
COM1A0/
COM1B0 Description
00Normalportoperation,OC1A/OC1Bdisconnected.
01WGM13=0:Normalportoperation,OC1A/OC1Bdisconnected.
WGM13=1: Togg le OC1A on comparematch, OC1Breserved.
10ClearOC1A/OC1B on comparematch when up-counting. Set
OC1A/OC1B on comparematch when downcounting.
11Set OC1A/OC1B on comparematch when up-counting. Clear
OC1A/OC1B on comparematch when downcounting.
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