Rainbow-electronics ATmega8515L Manual de usuario descargar pdf (Pagina 114)

114

ATmega8515(L)

2512A–AVR–04/02

Timer/Counter Timing

Diagrams

TheTimer/Counter is a synchronousdesign and thetimerclock (clk

) is therefore

shownas a clock enable signal in the following figures.The figures includeinformation

on when interrupt flags are set, andwhen the OCR1x Register is updatedwith the

OCR1xbuffer value (only for modes utilizing double buffering). Figure55shows a timing

diagram for the setting ofOCF1x.

Figure 55. Timer/Counter Timing Diagram,Setting ofOCF1x, no Prescaling

Figure56shows the same timing data,but with the prescaler enabled.

Figure 56. Timer/Counter Timing Diagram,Setting ofOCF1x, with Prescaler(f

clk_I/O

/8)

Figure57shows the count sequence closetoTOPinvarious modes. When using phase

andfrequency correctPWM modethe OCR1x Register is updated at BOTTOM.The

timing diagramswill bethe same,but TOP should be replacedbyBOTTOM, TOP-1 by

BOTTOM+1andsoon.The same renaming appliesfor modes that set theTOV1 flag at

BOTTOM.

clk

(clk

I/O

/1)

OCFnx

clk

I/O

OCRnx

TCNTn

OCRnx Value

OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2

OCFnx

OCRnx

TCNTn

OCRnx Value

OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2

clk

I/O

clk

(clk

I/O

/8)

1 2 ... 109 110 111 112 113 114 115 116 117 118 119 ... 222 223

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Rainbow-electronics ATmega8515L Manual de usuario Pagina 114

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