Rainbow-electronics W90P710CDG Manual de usuario descargar pdf (Pagina 103)

100

101

W90P710CD/W90P710CDG

Publication Release Date: September 19, 2006

- 103 - Revision B2

6.5.1.2 Tx Buffer Descriptor

3 2 1 0

O Reserved I C P

Transmit Buffer Starting Address BO

Tx Status Transmit Byte Count

Next Tx Descriptor Starting Address

Tx Descriptor Word 0

31 30 29 28 27 26 25 24

Owner Reserved

23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8

Reserved

7 6 5 4 3 2 1 0

Reserved IntEn CRCApp PadEn

Owner [31]: Ownership

The ownership field defines which one, the CPU or EMC, is the owner of each Tx descriptor. Only the

owner has right to modify the Tx descriptor and the other can read the Tx descriptor only.

0: The owner is CPU

1: The owner is EMC

If the O=1’b1 indicates the EMC TxDMA is the owner of Tx descriptor and the Tx descriptor is

available for frame transmission. After the frame transmission completed, EMC TxDMA modify

ownership field to 1’b0 and return the ownership of Tx descriptor to CPU.

If the O=1’b0 indicates the CPU is the owner of Tx descriptor. After the CPU prepares new frame to

wait transmission, it modifies the ownership field to 1’b1 and releases the Tx descriptor to EMC

TxDMA.

IntEn [2]: Transmit Interrupt Enable

The IntEn controls the interrupt trigger circuit after the frame transmission completed. If the IntEn is

enabled, the EMC will trigger interrupt after frame transmission completed. Otherwise, the interrupt

doesn’t be triggered.

1’b0: Frame transmission interrupt is masked.

1’b1: Frame transmission interrupt is enabled.

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Rainbow-electronics W90P710CDG Manual de usuario Pagina 103

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Rainbow-electronics W90P710CDG Manual de usuario Pagina 103

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