
39
ATmega161(L)
1228C–AVR–08/02
Figure 30. Timer/Counter2 Prescaler
The clock source for Timer/Counter2 prescaler is named PCK2. PCK2 is by default con-
nected to the main system clock (CK). By setting the AS2 bit in ASSR, Timer/Counter2
is asynchronously clocked from the PD4(TOSC1) pin. This enables use of
Timer/Counter2 as a Real-time Clock (RTC). When AS2 is set, pins PD4(TOSC1) and
PD5(TOSC2) are disconnected from Port D. A crystal can then be connected between
the PD4(TOSC1) and PD5(TOSC2) pins to serve as an independent clock source for
Timer/Counter2. The Oscillator is optimized for use with a 32.768 kHz crystal. Alterna-
tively, an external clock signal can be applied to PD4(TOSC1). The frequency of this
clock must be lower than one fourth of the CPU clock and not higher than 256 kHz. Set-
ting the PSR2 bit in SFIOR Resets the prescaler. This allows the user to operate with a
predictable prescaler.
Special Function IO Register –
SFIOR
• Bits 7..2 – Res: Reserved Bits
These bits are reserved bits in the ATmega161 and always read as zero.
• Bit 1
– PSR2: Prescaler Reset Timer/Counter2
When this bit is set (one), the Timer/Counter2 prescaler will be reset. The bit will be
cleared by hardware after the operation is performed. Writing a zero to this bit will have
no effect. This bit will always be read as zero if Timer/Counter2 is clocked by the internal
CPU clock. If this bit is written when Timer/Counter2 is operating in asynchronous
mode, however, the bit will remain as one until the prescaler has been reset. See “Asyn-
chronous Operation of Timer/Counter2” on page 48 for a detailed description of
asynchronous operation.
10-BIT T/C PRESCALER
TIMER/COUNTER2 CLOCK SOURCE
CK
PCK2
TOSC1
AS2
CS20
CS21
CS22
PCK2/8
PCK2/64
PCK2/128
PCK2/1024
PCK2/256
PCK2/32
0
PSR2
Clear
TCK2
Bit 765432 1 0
$30 ($50) ––––––PSR2 PSR10 SFIOR
Read/Write R R R R R R R/W R/W
InitialValue000000 0 0
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