Rainbow-electronics ATmega128L Manual de usuario descargar pdf (Pagina 318)

318

ATmega128(L)

2467B–09/01

Table 140. External Data Memory Characteristics, 4.5 - 5.5 Volts, SRWn1 = 1, SRWn0 = 0

Symbol Parameter

4 MHz Oscillator Variable Oscillator

UnitMin Max Min Max

01/t

CLCL

Oscillator Frequency 0.0 TBD MHz

10 t

RLDV

Read Low to Data Valid TBD 3.0t

CLCL

-TBD ns

12 t

RLRH

RD Pulse Width TBD 3.0t

CLCL

-TBD ns

15 t

DVWH

Data Valid to WR High TBD 3.0t

CLCL

-TBD ns

16 t

WLWH

WR Pulse Width TBD 3.0t

CLCL

-TBD ns

Table 141. External Data Memory Characteristics, 4.5 - 5.5 Volts, SRWn1 = 1, SRWn0 = 1

Symbol Parameter

4 MHz Oscillator Variable Oscillator

UnitMin Max Min Max

01/t

CLCL

Oscillator Frequency 0.0 TBD MHz

10 t

RLDV

Read Low to Data Valid TBD 3.0t

CLCL

-TBD ns

12 t

RLRH

RD Pulse Width TBD 3.0t

CLCL

-TBD ns

14 t

WHDX

Data Hold After WR High TBD 1.5t

CLCL

-TBD ns

15 t

DVWH

Data Valid to WR High TBD 3.0t

CLCL

-TBD ns

16 t

WLWH

WR Pulse Width TBD 3.0t

CLCL

-TBD ns

Table 142. External Data Memory Characteristics, 2.7 - 5.5 Volts, No Wait-state

Symbol Parameter

4 MHz Oscillator Variable Oscillator

UnitMin Max Min Max

01/t

CLCL

Oscillator Frequency 0.0 TBD MHz

LHLL

ALE Pulse Width TBD t

CLCL

-TBD ns

AVLL

Address Valid A to ALE Low TBD 0.5t

CLCL

-TBD ns

3a t

LLAX_ST

Address Hold After ALE Low,

write access

TBD TBD

3b t

LLAX_LD

Address Hold after ALE Low,

read access

TBD TBD

AVLLC

Address Valid C to ALE Low TBD 0.5t

CLCL

-TBD ns

AVRL

Address Valid to RD Low TBD 1.0t

CLCL

-TBD ns

AVWL

Address Valid to WR Low TBD 1.0t

CLCL

-TBD ns

LLWL

ALE Low to WR Low TBD TBD 0.5t

CLCL

-TBD 0.5t

CLCL

-TBD ns

LLRL

ALE Low to RD Low TBD TBD 0.5t

CLCL

-TBD 0.5t

CLCL

-TBD ns

DVRH

Data Setup to RD High TBD TBD ns

10 t

RLDV

Read Low to Data Valid TBD TBD ns

11 t

RHDX

Data Hold After RD High TBD TBD ns

1 2 ... 313 314 315 316 317 318 319 320 321 322 323 ... 330 331

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