Rainbow-electronics ATmega128L Manual de usuario descargar pdf (Pagina 140)

140

ATmega128(L)

2467B–09/01

8-bit Timer/Counter2

with PWM

Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The

main features are:

• Single Channel Counter

• Clear Timer on Compare Match (Auto Reload)

• Glitch-free, Phase Correct Pulse width Modulator (PWM)

• Frequency Generator

• External Event Counter

• 10-bit Clock Prescaler

• Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)

Overview A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 60. For the

actual placement of I/O pins, refer to

“Pin Configurations” on page 2. CPU accessible

I/O registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O

“8-bit Timer/Counter Register Description” on

page 151

Figure 60. 8-Bit Timer/Counter Block Diagram

Registers The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers.

Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer

Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer

Interrupt Mask register (TIMSK). TIFR and TIMSK are not shown in the figure since

these registers are shared by other timer units.

The Timer/Counter can be clocked internally, via the prescaler, or by an external clock

source on the T2 pin. The Clock Select logic block controls which clock source and edge

the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is

Timer/Counter

DATABUS

TCNTn

Waveform

Generation

OCn

= 0

Control Logic

0xFF

BOTTOM

count

clear

direction

TOVn

(Int.Req.)

OCRn

TCCRn

Clock Select

Edge

Detector

( From Prescaler )

clk

TOP

OCn

(Int.Req.)

1 2 ... 135 136 137 138 139 140 141 142 143 144 145 ... 330 331

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