
55
ATmega32(L)
2503C–AVR–10/02
Alternate Functions of Port B The Port B pins with alternate functions are shown in Table 25.
The alternate pin configuration is as follows:
• SCK – Port B, Bit 7
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is
enabled as a Slave, this pin is configured as an input regardless of the setting of DDB7.
When the SPI is enabled as a Master, the data direction of this pin is controlled by
DDB7. When the pin is forced by the SPI to be an input, the pull-up can still be con-
trolled by the PORTB7 bit.
• MISO – Port B, Bit 6
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is
enabled as a Master, this pin is configured as an input regardless of the setting of
DDB6. When the SPI is enabled as a Slave, the data direction of this pin is controlled by
Table 24. Overriding Signals for Alternate Functions in PA3..PA0
Signal Name PA3/ADC3 PA2/ADC2 PA1/ADC1 PA0/ADC0
PUOE 0000
PUOV 0000
DDOE 0000
DDOV 0000
PVOE 0000
PVOV 0000
DIEOE 0000
DIEOV 0000
DI ––––
AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT
Table 25. Port B Pins Alternate Functions
Port Pin Alternate Functions
PB7 SCK (SPI Bus Serial Clock)
PB6 MISO (SPI Bus Master Input/Slave Output)
PB5 MOSI (SPI Bus Master Output/Slave Input)
PB4 SS
(SPI Slave Select Input)
PB3
AIN1 (Analog Comparator Negative Input)
OC0 (Timer/Counter0 Output Compare Match Output)
PB2
AIN0 (Analog Comparator Positive Input)
INT2 (External Interrupt 2 Input)
PB1 T1 (Timer/Counter1 External Counter Input)
PB0
T0 (Timer/Counter0 External Counter Input)
XCK (USART External Clock Input/Output)
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