Read Format
ADC Accumulator Register
The ADC Accumulator register contains the bits to
enable dither, set the accumulator count, and set the
20-bit accumulator data. The dither and accumulator
count bits are read/write and the accumulator data is
read only. A write to the register resets the accumulator
data (ACCDATA<19:0>) to 0x00000 and starts new
accumulation. The ACCDATA<19:0> bits remain
unchanged until the programmed count of conver-
sions is completed. The accumulator is functional for
the normal, fast power-down, and burst modes.
DITH: Dither bit (default = 0). When DITH = 0, the dither
generator is disabled and the accumulator can be used
for oversampling and providing digital filtering (see the
Applying a Digital Filter to ADC Data Using the 20-Bit
Accumulator
section). When DITH = 1, the dithering for
the ADC is enabled. Use dithering with the accumulator
to oversample data and decimate the result to extend the
effective resolution to a maximum of 16 bits and provide
digital filtering.
ACCC<2:0> ADC Accumulator Count bits (default =
000). The ACCC<2:0> bits set the number of ADC data
conversion results to be accumulated and then written to
the ACCDATA register before the ACF Status bit is set
(see Table 12). The ACF status bit is set in the Status
register when the data is written to the ACCDATA regis-
ter. If the accumulator count is set to 1, the accumulator
does not accumulate and the ACCDATA<11:0> is the
same as ADCDATA<11:0> in the ADC Data register.
ACCDATA<19:0>: ADC Accumulator Data bits (default =
0x00000). The ACCDATA<19:0> bits are the summation
of up to 256 ADC conversion results. When the count set
by ACCC<2:0> has been reached, the ACF status bit is
set and the accumulated data is written to this register.
The data is written to the register at a rate of the ADC
conversion rate divided by the accumulator count. The
accumulator does not exceed 0xFFFFF.
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