MAX1329/MAX1330
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________ 39
REGISTER
NAME
START
READ/
WRITE
(R/W)
ADDRESS
(ADR<4:0>)
DATA
(D<255:0>, D<23:0>, D<15:0>, OR D<7:0>)
ADC Control 0 0 R/W 0 0 0 0 0 AUTO<2:0> APD<1:0> AREF<1:0> REFE
ADC Setup 0 0 R/W 0 0 0 0 1 MSEL MUX<3:0> GAIN<1:0> BIP
ADC Data 0 0 1 0 0 0 1 0 ADCDATA<11:0> XXXX
0 AFFD<3:0> AFFI<3:0>
ADC FIFO 0 0
1
00011
AFFDATA<11:0>* AFFA<3:0>*
0 DITH ACCC<2:0> XXXX
ADC Accumulator 0 0
1
00100
DITH ACCC<2:0> ACCDATA<19:0>
ADC GT Alarm 0 0 R/W 0 0 1 0 1 GTAM GTAC<2:0> GTAT<11:0>
ADC LT Alarm 0 0 R/W 0 0 1 1 0 LTAM LTAC<2:0> LTAT<11:0>
DAC Control 0 0 R/W 0 0 1 1 1 DAPD1
DAPD0/
OA3E
DBPD1
DBPD0/
OA2E
OA1E DREF<1:0> REFE
FIFOA Control 0 0 R/W 0 1 0 0 0 FFAE BIPA SYMA CONA DPTA<3:0>
Reserved 0 0 X 0 1 0 0 1
RESERVED, DO NOT USE
FIFOA Data 0 0 R/W 0 1 0 1 0 FFADATA<11:0> XXXX
Reserved 0 0 X 0 1 0 1 1 RESERVED, DO NOT USE
FIFO Sequence 0 0 W 01100XXXXXXXX
Clock Control 0 0 R/W 0 1 1 0 1 ODLY OSCE CLKIO<1:0> ADDIV<1:0> ACQCK<1:0>
CP/VM Control 0 0 R/W 0 1 1 1 0 INTP VM1<1:0> VM2CP<2:0> CPDIV<1:0>
Switch Control 0 0 R/W 01111
DSWA/
OSW3
DSWB OSW1 OSW2 SPDT1<1:0> SPDT2<1:0>
APIO Control 0 0 R/W 1 0 0 0 0 AP4MD<1:0> AP3MD<1:0> AP2MD<1:0> AP1MD<1:0>
APIO Setup 0 0 R/W 1 0 0 0 1 AP4PU AP3PU AP2PU AP1PU AP4LL AP3LL AP2LL AP1LL
DP4MD<3:0> DP3MD<3:0>
DPIO Control 0 0 R/W 10010
DP2MD<3:0> DP1MD<3:0>
DPIO Setup 0 0 R/W 1 0 0 1 1 DP4PU DP3PU DP2PU DP1PU DP4LL DP3LL DP2LL DP1LL
VM1A VM1B VM2 ADD AFF ACF GTA LTA
APR<4:1> APF<4:1>
Status 0 0 R 1 0 1 0 0
DPR<4:1> DPF<4:1>
MV1A MV1B MV2 MADD MAFF MACF MGTA MLTA
MAPR<4:1> MAPF<4:1>Interrupt Mask 0 0 R/W 10101
MDPR<4:1> MDPF<4:1>
Reserved 0 0 X 1 0 1 1 0 RESERVED, DO NOT USE
Reserved 0 0 X 1 0 1 1 1 RESERVED, DO NOT USE
Reserved 0 0 X 1 1 0 0 0 RESERVED, DO NOT USE
Table 3. Register Summary
Note: R/W = 0 for write, R/W = 1 for read, X = don’t care.
*
Data length can vary from 1 to 16 words, where a word is 16 bits (12 data bits plus 4 address bits).
Register Definitions
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