
36
4202E–SCR–06/06
SFR’s Description
Note: 1. Only for AT8xC5122
Note: 1. Only for AT8xC5122
Table 10. C51 Core SFRs
MnemonicAddName 76543210
ACC E0h Accumulator ACC
B F0h B Register B
PSW D0h Program Status Word CY AC F0 RS1 RS0 OV F1 P
SP 81h Stack Pointer SP
DPL 82h
Data Pointer Low byte (LSB
of DPTR)
DPL
DPH 83h
Data Pointer High byte
(MSB of DPTR)
DPH
Table 11. Clock SFRs
MnemonicAddName 76 5 43210
PCON 87h Power Controller SMOD1 SMOD0
POF GF1 GF0 PD IDL
CKCON0 8Fh Clock Controller 0
WDX2 SIX2 T1X2 T0X2 X2
CKCON1 AFh Clock Controller 1
SPIX2
CKSEL 85h Clock Selection
CKS
CKRL 97h Clock Reload Register
CKREL 3-0
PLLCON A3h PLL Controller Register
EXT48 PLLEN PLOCK
PLLDIV A4h PLL Divider register R3-0 N3-0
AUXR 8Eh Auxiliary Register 0 DPU
XRS0 EXTRAM A0
AUXR1 A2h Auxiliary Register 1
ENBOOT
(1)
GF3 DPS
RCON
(1)
D1h
CRAM memory
Configuration
RPS
Table 12. I/O Port SFRs
Mnemonic Add Name 7 6 5 4 3 2 1 0
P0
(1)
80h Port 0 P0
P1 90h Port 1 P1
P2
(1)
A0h Port 2 P2
P3 B0h Port 3 P3
P4
(1)
C0h Port 4 P4
P5 E8h Port 5 P5 (only P5.0 for AT8xC5122)
PMOD0 91h Port Mode Register 0 P3C1 P3C0 P2C1
(1)
P2C0
(1)
CPRESRES - P0C1
(1)
P0C0
(1)
PMOD1 84h Port Mode Register 1 P5HC1
(1)
P5HC0
(1)
P5MC1
(1)
P5MC0
(1)
P5LC1 P5LC0 P4C1
(1)
P4C0
(1)
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