Rainbow-electronics AT89C5122 Manual de usuario descargar pdf (Pagina 123)

123

AT8xC5122/23

4202E–SCR–06/06

Reset Value = 0000 0000b

Table 73. USB Endpoint FIFO Reset Register - UEPRST (S:D5h)

76543210

- EP6RST EP5RST EP4RST EP3RST EP2RST EP1RST EP0RST

Bit

Number

Bit

Mnemonic Description

7-

Reserved

The value read from these bits is always 0. Do not change this bit.

6EP6RST

Endpoint 6 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

5EP5RST

Endpoint 5 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

4EP4RST

Endpoint 4 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

3EP3RST

Endpoint 3 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

2EP2RST

Endpoint 2 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

1EP1RST

Endpoint 1 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

0EP0RST

Endpoint 0 FIFO Reset

Set this bit and reset the endpoint FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

Then, clear this bit to complete the reset operation and start using the FIFO.

1 2 ... 118 119 120 121 122 123 124 125 126 127 128 ... 212 213

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