
Rev.A - May 17, 2001 67
Preliminary
T89C51CC02
14.4. Register
WDTPRG (S:A7h)
WatchDog Timer Duration Programming register
Reset Value = XXXX X000b
Figure 54. WDTPRG Register
WDTRST (S:A6h Write only)
WatchDog Timer Enable register
Reset Value = 1111 1111b
NOTE:
The WDRST register is used to reset/enable the WDT by writing 1EH then E1H in sequence.
.
Figure 55. WDTRST Register
7 6 5 4 3 2 1 0
- - - - - S2 S1 S0
Bit Number Bit Mnemonic Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2S2
WatchDog Timer Duration selection bit 2
Work in conjunction with bit 1 and bit 0.
1S1
WatchDog Timer Duration selection bit 1
Work in conjunction with bit 2 and bit 0.
0S0
WatchDog Timer Duration selection bit 0
Work in conjunction with bit 1 and bit 2.
7 6 5 4 3 2 1 0
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Bit Number Bit Mnemonic Description
7-Watchdog Control Value
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