
Rev.A - May 17, 2001 27
Preliminary
T89C51CC02
7.4. Registers
FCON (S:D1h)
FLASH Control Register
Reset Value= 0000 0000b
Figure 12. FCON Register
7 6 5 4 3 2 1 0
FPL3 FPL2 FPL1 FPL0 FPS FMOD1 FMOD0 FBUSY
Bit Number Bit Mnemonic Description
7-4 FPL3:0
Programming Launch Command Bits
Write 5Xh followed by AXh to launch the programming according to FMOD1:0. (see Table 14.)
3 FPS
FLASH Map Program Space
Set to map the column latch space in the data memory space.
Clear to re-map the data memory space.
2-1 FMOD1:0
FLASH Mode
See Table 13 or Table 14.
0 FBUSY
FLASH Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be cleared by software.
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