Rainbow-electronics T89C51CC02 Manual de usuario descargar pdf (Pagina 126)

126 Rev.A - May 17, 2001

Preliminary

T89C51CC02

IPL1 (S:F8h)

Interrupt Priority Low Register 1

Reset Value: XXXX X000b

bit addressable

Figure 130. IPL1 Register

7 6 5 4 3 2 1 0

- - - - POVRL PADCL PCANL

Bit Number Bit Mnemonic Description

7-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

6-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

5-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

4-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

2 POVRL

Timer overrun Interrupt Priority level less significant bit.

Refer to PI2CH for priority level.

1 PADCL

ADC Interrupt Priority level less significant bit.

Refer to PSPIH for priority level.

0 PCANL

CAN Interrupt Priority level less significant bit.

Refer to PKBH for priority level.

1 2 ... 121 122 123 124 125 126 127 128 129 130 131 ... 136 137

T89C51CC02 1

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