
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 451 - Revision B2
Smart Card Host Status Register (SCHI_SCSR)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
SCHI_SCSR0 0xFFF8_5014 R Smart card Status Register 0 0x0000_0060
SCHI_SCSR1 0xFFF8_5814 R Smart card Status Register 1 0x0000_0060
BITS DESCRIPTIONS
[31:11]
RESERVED RESERVED
[10:8]
TOF2,
TOF1,
TOF0
TOF2 is Time-Out Flag of Timer2.
When Timer 2 time out, it will set the FLAG (TOF2)
When host reads SCSR, it clears this bit to "0".
TOF1 is Time-Out Flag of Timer1.
When Timer 1 time out, it will set the FLAG (TOF1)
When host reads SCSR, it clears this bit to "0".
TOF0 is Time-Out Flag of Timer0.
When Timer 0 time out, it will set the FLAG (TOF0)
When host reads SCSR, it clears this bit to "0".
[7]
SC_RESET
SC_RESET pin status
This bit reflects the RESET pin high or low.
[6]
TSRE
Transmitter Shift Register Empty
This bit is set to "1" when transmitter shift register is empty.
31 30 29 28 27 26 25 24
RESERVED
23 22 21 20 19 18 17 16
RESERVED
15 14 13 12 11 10 9 8
RESERVED
TOF2 TOF1 TOF0
7 6 5 4 3 2 1 0
SC_RESET TSRE TBRE SBD NSER PBER OER RDR
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