
Power-Management ICs for
ICERA E400/E450 Platform
MAX8982A/MAX8982X
54
Table 30. BUCK1DVS2 Register (Output Voltage Setting for BUCK1 (DVS1 = High))
X = Don’t care.
ADDRESS
(HEX)
POR
(HEX)
R/W BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
40 0C R/W Reserved Reserved Reserved SD1[4:0]
BITS 7:5 Reserved, write 000 to these bits.
DESCRIPTION
BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 V
PROG
(V)
0 0 0 0 0 0.600
0 0 0 0 1 0.625
0 0 0 1 0 0.650
0 0 0 1 1 0.675
0 0 1 0 0 0.700
0 0 1 0 1 0.725
0 0 1 1 0 0.750
0 0 1 1 1 0.775
0 1 0 0 0 0.800
0 1 0 0 1 0.825
0 1 0 1 0 0.850
0 1 0 1 1 0.875
0 1 1 0 0 0.900
0 1 1 0 1 0.925
0 1 1 1 0 0.950
0 1 1 1 1 0.975
1 0 0 0 0 1.000
1 0 0 0 1 1.025
1 0 0 1 0 1.050
1 0 0 1 1 1.075
1 0 1 0 0 1.100
1 0 1 0 1 1.125
1 0 1 1 0 1.150
1 0 1 1 1 1.175
1 1 X X X 1.200
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