Rainbow-electronics DS92LV040A Manual de usuario descargar pdf (Pagina 11)

Pinout Description

Pin Name Pin # Input/Output Descriptions

DO+/RI+ 14, 16, 19, 21 I/O True Bus LVDS Driver Outputs and Receiver Inputs.

DO−/RI− 13, 15, 18, 20 I/O Complimentary Bus LVDS Driver Outputs and Receiver Inputs.

35, 37, 40, 42 I LVTTL Driver Input. No pull up or pull down is attached to this pin

RO 36, 38, 41, 43 O LVTTL Receiver Output.

RE12

29 I Receiver Enable LVTTL Input (Active Low). This pin, when low,

configures receiver outputs, RO1 and RO2 active. When this pin is

high, RO1 and RO2 are TRI-STATE. If this pin is floating, a weak

current source to V

causes RO1 and RO2 to be TRI-STATE

RE34

5 I Receiver Enable LVTTL Input (Active Low). This pin, when low,

configures receiver outputs, RO3 and RO4 active. When this pin is

high, RO3 and RO4 are TRI-STATE. If this pin is floating, a weak

current source to V

causes RO3 and RO4 to be TRI-STATE

DE12 26 I Driver Enable LVTTL Input (Active High). This pin, when high,

configures driver outputs, DO1+/RIN1+, DO1−/RIN1− and

DO2+/RIN2+, DO2−/RIN2− active. When this pin is low, driver outputs

1 and 2 are TRI-STATE. If this pin is floating, a weak current source

to V

causes driver outputs 1 and 2 to be active

DE34 8 I Driver Enable LVTTL Input (Active High). This pin, when high,

configures driver outputs, DO3+/RIN3+, DO3−/RIN3− and

DO4+/RIN4+, DO4−/RIN4− active. When this pin is low, driver outputs

3 and 4 are TRI-STATE. If this pin is floating, a weak current source

to V

causes driver outputs 3 and 4 to be active

GND 4, 28, 31, 39 Ground Ground for digital circuitry (must connect to GND on PC board). These

pins connected internally.

3, 6, 30 Power V

for digital circuitry (must connect to V

on PC board). These

pins connected internally.

AGND 9, 17, 25 Ground Ground for analog circuitry (must connect to GND on PC board).

These pins connected internally.

7, 10, 22, 27 Power Analog V

(must connect to V

on PC board). These pins

connected internally.

NC 1, 2, 11, 12, 23, 24,

32, 33, 34, 44

N/A Reserved for future use, leave open circuit.

DAP GND Must connect to GND plane through vias to achieve the theta ja

specified under Absolute Maximum Ratings. The DAP (die attach pad)

is the heat transfer material that is centered on the bottom of the LLP

package. Refer to application note AN-1187 for attachment details.

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Rainbow-electronics DS92LV040A Manual de usuario Pagina 11

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