Rainbow-electronics DS2505 Manual de usuario

Busca en linea o descarga Manual de usuario para Panel De Control Rainbow-electronics DS2505. Rainbow Electronics DS2505 User Manual Manual de usuario

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1 of 24 032201
FEATURES
16384 bits Electrically Programmable Read
Only Memory (EPROM) communicates with
the economy of one signal plus ground
Unique, factory-lasered and tested 64-bit
registration number (8-bit family code +
48-bit serial number + 8-bit CRC tester)
assures absolute traceability because no two
parts are alike
Built-in multidrop controller ensures
compatibility with other 1-Wire Net
products
EPROM partitioned into sixty-four 256-bit
pages for randomly accessing packetized data
records
Each memory page can be permanently write-
protected to prevent tampering
Device is an “add only” memory where
additional data can be programmed into
EPROM without disturbing existing data
Architecture allows software to patch data by
superseding an old page in favor of a newly
programmed page
Reduces control, address, data, power, and
programming signals to a single data pin
Directly connects to a single port pin of a
microprocessor and communicates at up to
16.3 kbits per second
8-bit family code specifies DS2505
communications requirements to reader
Presence detector acknowledges when the
reader first applies voltage
Low cost TO-92 or 6-pin TSOC surface
mount package
Reads over a wide voltage range of 2.8V to
6.0V from -40°C to +85°C; programs at
11.5V to 12.0V from -40°C to +50°C
PIN ASSIGNMENT
ORDERING INFORMATION
DS2505 TO-92 Package
DS2505P 6-pin TSOC Package
DS2505/T&R Tape & Reel version of DS2505
DS2505P/T&R Tape & Reel version of DS2505P
Top View
3.7 X 4.0 X 1.5 mm
DATA
1
2
3
6
5
4
Side View
See Mech.
Drawing Section
TSOC PACKAGE
GND
NC NC
NC
NC
DS2505
16-kbit Add-Only Memory
www.dalsemi.com
GND
DATA
NC
Bottom View
See Mech.
Drawings Section
TO-92
DALLAS
DS2505
2 3
1
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Indice de contenidos

Pagina 1 - 16-kbit Add-Only Memory

1 of 24 032201FEATURES 16384 bits Electrically Programmable ReadOnly Memory (EPROM) communicates withthe economy of one signal plus ground Unique,

Pagina 2 - 64-BIT LASERED ROM

DS250510 of 24MEMORY FUNCTION FLOW CHART Figure 5 (cont’d)

Pagina 3

DS250511 of 24Note that the initial pass through the Read Status flow chart will generate a 16-bit CRC value that is theresult of clearing the CRC gen

Pagina 4 - 16384-BITS EPROM

DS250512 of 24With the next 24 read data time slots the master will receive the Redirection Byte of the next pagefollowed by a 16-bit CRC of the Redir

Pagina 5 - EPROM STATUS BYTES

DS250513 of 24As the DS2505 receives this byte of data into the scratchpad, it also shifts the data into the CRC generatorthat has been preloaded with

Pagina 6 - STATUS MEMORY MAP

DS250514 of 24responds with the data from the selected EPROM Status address sent least significant bit first. This bytecontains the logical AND of al

Pagina 7 - READ STATUS [AAH]

DS250515 of 24Hardware ConfigurationThe 1-Wire bus has only a single line by definition; it is important that each device on the bus be able todrive i

Pagina 8

DS250516 of 24DS2505 EQUIVALENT CIRCUIT Figure 6BUS MASTER CIRCUIT Figure 7

Pagina 9

DS250517 of 24ROM FUNCTIONS FLOW CHART Figure 8

Pagina 10 - 10 of 24

DS250518 of 24Match ROM [55H]The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address aspecific DS2505 on a multidro

Pagina 11 - EXTENDED READ MEMORY [A5H]

DS250519 of 24(Figure 11) should be applied for 480 µs, after which the bus master returns the data line to an idle highstate controlled by the pullup

Pagina 12 - 12 of 24

DS25052 of 24SILICON LABEL DESCRIPTIONThe DS2505 16-kbit Add–Only Memory identifies and stores relevant information about the product towhich it is as

Pagina 13 - 13 of 24

DS250520 of 24READ/WRITE TIMING DIAGRAM Figure 10 (cont’d)NOTE:For read-data time slots the optimal sampling point for the master is as close as poss

Pagina 14 - 1-WIRE BUS SYSTEM

DS250521 of 24PROGRAM PULSE TIMING DIAGRAM Figure 11CRC GENERATIONWith the DS2505 there are two different types of CRCs (Cyclic Redundancy Checks).

Pagina 15 - INITIALIZATION

DS250522 of 24When reading the data memory of the DS2505 with the Extended Read Memory command, there are twosituations where a 16-bit CRC is transmit

Pagina 16 - BUS MASTER CIRCUIT Figure 7

DS250523 of 24ABSOLUTE MAXIMUM RATINGS*Voltage on any Pin Relative to Ground -0.5V to +12.0VOperating Temperature -40°C to +85°CStorage Temperature -5

Pagina 17 - 17 of 24

DS250524 of 24NOTES:1. All voltages are referenced to ground.2. VPUP = external pullup voltage. If VPUP is lower than 3.0V the first byte read (any

Pagina 18 - 18 of 24

DS25053 of 24protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure 8). The1-Wire bus master must first pro

Pagina 19 - RESISTOR

DS25054 of 24HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 264-BIT LASERED ROM Figure 38-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (0B

Pagina 20 - 20 of 24

DS25055 of 24EPROM STATUS BYTESIn addition to the 16384 bits of data memory the DS2505 provides 704 bits of Status Memory accessiblewith separate comm

Pagina 21 - CRC GENERATION

DS25056 of 24The Status Memory address range of the DS2505 extends from 000 to 13FH. The memory locations008H to 01FH, 028H to 03FH, 048H to 0FFH and

Pagina 22 - 22 of 24

DS25057 of 24MEMORY FUNCTION COMMANDSThe “Memory Function Flow Chart” (Figure 5) describes the protocols necessary for accessing thevarious data field

Pagina 23 - 23 of 24

DS25058 of 24MEMORY FUNCTION FLOW CHART Figure 5

Pagina 24 - 24 of 24

DS25059 of 24MEMORY FUNCTION FLOW CHART Figure 5 (cont’d)

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