1 of 19 043001 FEATURES • Unique 1-wire interface requires only one port pin for communication • Derives power from data line (“parasite
DS1822-PAR 10 of 19 register (byte 3), and the third byte is written into the configuration register (byte 4). Data must be transmitted least signi
DS1822-PAR 11 of 19 ROM COMMANDS FLOW CHART Figure 9 CCh SKIP ROM COMMAND MASTER TX RESE
DS1822-PAR 12 of 19 DS1822-PAR FUNCTION COMMANDS FLOW CHART Figure 10 MASTER TX FUNCTION COMMAND YN44h CONVERT TEMPERATURE ? MASTER ENABLES STRONG
DS1822-PAR 13 of 19 1-WIRE SIGNALING The DS1822-PAR uses a strict 1-wire communication protocol to insure data integrity. Several signal types are d
DS1822-PAR 14 of 19 The DS1822-PAR samples the 1-wire bus during a window that lasts from 15 µs to 60 µs after the master initiates the write time s
DS1822-PAR 15 of 19 resister. Output data from the DS1822-PAR is valid for 15 µs after the falling edge that initiated the read time slot. Therefo
DS1822-PAR 16 of 19 DS1822-PAR OPERATION EXAMPLE 1 In this example there are multiple DS1822-PARs on the bus. The bus master initiates a temperatur
DS1822-PAR 17 of 19 ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to ground –0.5V to +6.0V Operating temperature –55°C to +100°C Storage t
DS1822-PAR 18 of 19 AC ELECTRICAL CHARACTERISTICS: (-55°C to +100°C; VPU=3.0V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTEStCONV
DS1822-PAR 19 of 19 TIMING DIAGRAMS Figure 16
DS1822-PAR 2 of 19 DETAILED PIN DESCRIPTIONS Table 1 PIN SYMBOL DESCRIPTION 1 GND Ground. 2 DQ Data Input/Output pin. Open-drain 1-wire interface p
DS1822-PAR 3 of 19 PARASITE POWER The DS1822-PAR’s parasite power circuit allows the DS1822-PAR to operate without a local external power supply. T
DS1822-PAR 4 of 19 TEMPERATURE REGISTER FORMAT Figure 3 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 LS Byte 23 22 21 20 2-1 2-2 2-3 2-
DS1822-PAR 5 of 19 64-BIT LASERED ROM CODE Each DS1822-PAR contains a unique 64–bit code (see Figure 5) stored in ROM. The least significant 8 bits
DS1822-PAR 6 of 19 Data is written to bytes 2, 3, and 4 of the scratchpad using the Write Scratchpad [4Eh] command, and the data must be transmitted
DS1822-PAR 7 of 19 bus master. There is no circuitry inside the DS1822-PAR that prevents a command sequence from proceeding if the DS1822-PAR CRC (
DS1822-PAR 8 of 19 HARDWARE CONFIGURATION cáÖìêÉ=V= TRANSACTION SEQUENCE The transaction sequence for accessing the DS1822-PAR
DS1822-PAR 9 of 19 learns the ROM codes through a process of elimination that requires the master to perform a Search ROM cycle (i.e., Search ROM co
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