Rainbow-electronics DS1846 Manual de usuario Pagina 15
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DS1846
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NOTES:
1. All voltages are referenced to ground.
2. I
STBY
specified with for V
CC
equal 3.0V and 5.0V and control port logic pins are driven to the
appropriate logic levels. Appropriate logic levels specify that logic inputs are within a 0.5V of
ground or V
CC
for the corresponding inactive state.
3. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V
CC
is switched off.
4. Address Inputs, A0, A1, and A2, should be tied to either V
CC
or GND depending on the desired
address selections.
5. I
STBY
specified with for V
CC
equal 3.0 V and 5.0V and control port logic pins are driven to the
appropriate logic levels. Appropriate logic levels specify that logic inputs are within a 0.5V of
ground or V
CC
for the corresponding inactive state.
6. A fast mode device can be used in a standard mode system, but the requirement t
SU:DAT
> 250 ns
must then be met. This will automatically be the case if the device does not stretch the LOW period
of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the
next data bit to the SDA line t
RMAX
+ t
SU:DAT
= 1000+250=1250 ns before the SCL line is released.
7. After this period, the first clock pulse is generated.
8. The maximum t
HD:DAT
has only to be met if the device does not stretch the LOW period (t
LOW
) of
the SCL signal.
9. A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the
V
IN
MIN
of the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
10. C
B
- total capacitance of one bus line in picofarads, timing referenced to (0.9(V
CC
) and (0.1)( V
CC
).
11. EEPROM write begins after a stop condition occurs.
12. Resistor inputs can not go beneath GND by more than 0.5V or above V
CC
by more that 0.5V.
13. The –3 dB cutoff frequency for the DS1846 is 1 MHz.
14. Absolute linearity is used to measure expected wiper voltage as determined by wiper position. The
DS1846 is specified to provide an absolute linearity of ± 0.5 LSB.
15. Relative linearity is used to determine the change of wiper voltage between two adjacent wiper
positions. The DS1846 is specified to have a relative linearity of ± 0.25 dB.
16. When used as a rheostat or variable resister the temperature coefficient applies: 750 PPM/°C. When
used as a voltage divider or potentiometer, the effective temperature coefficient approaches
30 PPM/°C.
- NV Tri-Potentiometer 1
- Memory and MicroMonito 1
- PIN DESCRIPTIONS 3
- MEMORY ORGANIZATION 4
- DEVICE OPERATION 4
- CURRENT ADDRESS READ 5
- RANDOM READ 5
- SEQUENTIAL ADDRESS READ 5
- 2-WIRE SERIAL PORT OPERATION 6
- WRITE PROTECT 8
- Power Monitor 8
- Pushbutton Reset 8
- Non-Maskable Interrupt 8
- PUSHBUTTON RESET Figure 4 10
- Figure 5 10
- 12 of 16 12
- PBRST Input High Level 12
- PBRST Input Low Level 12
- 13 of 16 13
- ** standard mode 14
- * fast mode 14
- 15 of 16 15
- 16 of 16 16
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