Rainbow-electronics BR24L16FVM-W Manual de usuario Pagina 18

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BR24L16-W / BR24L16F-W / BR24L16FJ-W /
Memory ICs
BR24L16FV-W / BR24L16FVM-W
18/25
LV
CC
circuit
LV
CC
circuit inhibit write operation at low voltage, and prevent an inadvertent write. Below the LV
CC
voltage
(Typ.=1.2V), write operation is inhibited.
6) I / O circuit
Pull up resister of SDA pin
The pull up resister is needed because SDA is NMOS open drain. Decide the value of this resister (R
PU
) properly,
by considering V
IL
, I
L
characteristics of a controller which control the device and V
OH
, I
OL
characteristics of the device.
If large R
PU
is chosen, clock frequency need to be slow. In case of small R
PU
, the operating current increases.
Maximum of R
PU
Maximum of R
PU
is determined by following factor.
SDA rise time determined by R
PU
and the capacitance of bus line (CBUS) must be less than T
R
.
And the other timing must keep the conditions of AC spec.
When SDA bus is HIGH, the voltage A of SDA bus determined by a total input leak (I
L
) of the all devices
connected
to the bus and R
PU
must be enough higher than input HIGH level of a controller and the device,
including noise margin 0.2 V
CC
.
A
IL IL
MICRO
COMPUTER
BR24LXX
SDA PIN
R
PU
THE CAPACITANCE OF
BUS LINE (CBUS)
VCC ILRPU 0.2VCC VIH
RPU
0.8VCC VIH
IL
R
PU
0.8×30.7×3
10×10
6
300 [k]
Examples : When V
CC=3V IL=10µA VIH=0.7VCC
According to
2
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