
12
AT77C105A [Preliminary]
5419A–BIOM–01/05
Sensor and Block Diagram
Figure 7. Functional Block Diagram
The circuit is divided into the following main sections:
• An array or frame of 8 × 232 pixels + 1 dummy column
• An analog to digital converter
• An on-chip oscillator
• Control and status registers
• Navigation and click units
• Slow and fast serial interfaces
FPL VDDA GNDA VDDD
GNDD RST
FSS
SCK
MISO
MOSI
SSS
IRQ
SCANEN
TESTA
Pixel Array
(232 x 8)
Array
CTRL
Click
CTRL
VDD_IO
Click Pixels
(12)
Acquisition
Navigation
Algorithms
Oscillator (420 kHz)
Click
Algorithm
Watchdog
Heating
Test
Slow Serial
Interface
SPI
(200 kHz)
+
Control
Register
Fast Serial
Interface
SPI
(8-16 MHz)
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