Rainbow-electronics ATA6624 Manual de usuario descargar pdf

Features

• Master and Slave Operation Possible

• Supply Voltage up to 40V

• Operating voltage V

= 5V to 27V

• Typically 10 µA Supply Current During Sleep Mode

• Typically 57 µA Supply Current in Silent Mode

• Linear Low-drop Voltage Regulator:

– Normal, Fail-safe, and Silent Mode

– ATA6622 V

= 3.3V ±2%

– ATA6624 V

= 5.0V ±2%

– ATA6626 V

= 5.0V ±2%, TXD Time-out Timer Disabled

– In Sleep Mode V

is Switched Off

• VCC- Undervoltage Detection (4 ms Reset Time) and Watchdog Reset Logical

Combined at Open Drain Output NRES

• Negative Trigger Input for Watchdog

• Boosting the Voltage Regulator Possible with an External NPN Transistor

• LIN Physical Layer According to LIN 2.0 Specification and SAEJ2602-2

• Wake-up Capability via LIN-bus, Wake Pin, or Kl_15 Pin

• INH Output to Control an External Voltage Regulator or to Switch off the Master Pull Up

Resistor

• TXD Time-out Timer; ATA6626 TXD Time-out Timer Is Disabled

• Bus Pin is Overtemperature and Short Circuit Protected versus GND and Battery

• Adjustable Watchdog Time via External Resistor

• Advanced EMC and ESD Performance

• ESD HBM 8 kV at Pins LIN and VS According to STM5.1

• Package: QFN 5 mm × 5 mm with 20 Pins

1. Description

The ATA6622 is a fully integrated LIN transceiver, which complies with the LIN 2.0

and SAEJ2602-2 specifications. It has a low-drop voltage regulator for 3.3V/50 mA

output and a window watchdog. The ATA6624 has the same functionality as the

ATA6622; however, it uses a 5V/50 mA regulator. The ATA6626 has the same func-

tionality as ATA6624 without a TXD time-out timer. The voltage regulator is able to

source 50 mA up to V

= 18V. The output current of the regulator can be boosted by

using an external NPN transistor. This chip combination makes it possible to develop

inexpensive, simple, yet powerful slave and master nodes for LIN-bus systems.

ATA6622/ATA6624/ATA6626 are designed to handle the low-speed data communica-

tion in vehicles, e.g., in convenience electronics. Improved slope control at the

LIN-driver ensures secure data communication up to 20 kBaud. Sleep Mode and

Silent Mode guarantee very low current consumption. The ATA6626 is able to switch

the LIN unlimited to dominant level via TXD for low data rates.

LIN Bus

Transceiver

with 3.3V (5V)

Regulator and

Watchdog

ATA6622

ATA6624

ATA6626

4986F–AUTO–07/08

1 2 3 4 5 6 ... 28 29

Indice de contenidos

Pagina 1 - 1. Description

Features• Master and Slave Operation Possible• Supply Voltage up to 40V• Operating voltage VS = 5V to 27V• Typically 10 µA Supply Current During Sleep

Pagina 2

104986F–AUTO–07/08ATA6622/ATA6624/ATA6626The VCC regulator is activated, and the internal LIN slave termination resistor is switched on.The remote wak

Pagina 3

114986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 4-5. LIN Wake Up from Sleep Mode Table 4-1. Table of ModesMode of Operation Transceiver VCC Watchdog W

Pagina 4

124986F–AUTO–07/08ATA6622/ATA6624/ATA66265. Wake-up Scenarios from Silent or Sleep Mode5.1 Remote Wake-up via Dominant Bus StateA voltage less than th

Pagina 5

134986F–AUTO–07/08ATA6622/ATA6624/ATA66265.5 Fail-safe Features• During a short-circuit at LIN to VBattery, the output limits the output current to IB

Pagina 6

144986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 5-1. VCC Voltage Regulator: Ramp-up and Undervoltage Detection Figure 5-2. Power Dissipation: Safe Ope

Pagina 7

154986F–AUTO–07/08ATA6622/ATA6624/ATA66266. WatchdogThe watchdog anticipates a trigger signal from the microcontroller at the NTRIG (negative edge)inp

Pagina 8

164986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 6-1. Timing Sequence with RWD_OSC = 51 kΩ 6.2 Worst Case Calculation with RWD_OSC = 51 kΩThe internal

Pagina 9

174986F–AUTO–07/08ATA6622/ATA6624/ATA66267. Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent

Pagina 10 - ATA6622/ATA6624/ATA6626

184986F–AUTO–07/08ATA6622/ATA6624/ATA66268. Electrical Characteristics5V < VS < 27V, -40°C < Tj < 150°C, unless otherwise specified. All v

Pagina 11

194986F–AUTO–07/08ATA6622/ATA6624/ATA66263.5Low-level input current at local wake-up requestFail-safe ModeVLIN = VSVWAKE = 0VVTXD = 0.4VTXD ITXDwake22

Pagina 12

24986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 1-1. Block Diagram AdjustableWatchdogOscillatorShort Circuit andOvertemperatureProtectionTXDTime-outTim

Pagina 13

204986F–AUTO–07/08ATA6622/ATA6624/ATA66268.7LIN current limitationVBUS = VBatt_max LIN IBUS_LIM40 120 200 mA A8.8Input leakage current at the receiver

Pagina 14

214986F–AUTO–07/08ATA6622/ATA6624/ATA662610.5Time delay for mode change from Silent Mode into Normal Mode via ENVEN = 5V ts_n51540µsA10.6 Duty cycle 1

Pagina 15

224986F–AUTO–07/08ATA6622/ATA6624/ATA662613 Watchdog Oscillator13.1Voltage at WD_OSC in Normal ModeIWD_OSC = –200 µAVVS ≥ 4VVWD_OSC1.13 1.23 1.33 V A1

Pagina 16

234986F–AUTO–07/08ATA6622/ATA6624/ATA662617 VCC Voltage Regulator ATA662217.1 Output voltage VCC4V < VS < 18V(0 mA to 50 mA)VCCnor3.234 3.366 V

Pagina 17

244986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 8-1. Definition of Bus Timing Characteristics TXD(Input to transmitting node)VS(Transceiver supplyof t

Pagina 18

254986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 8-2. Application Circuit 67 8 10920 19 18MLP 5 mm × 5 mm0.65 mm pitch20 leadATA6622/24/26161112131415T

Pagina 19

264986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 8-3. Application Circuit with External NPN 67 8 10920 19 18MLP 5 mm × 5 mm0.65 mm pitch20 leadATA6622/

Pagina 20

274986F–AUTO–07/08ATA6622/ATA6624/ATA662610. Package Information 9. Ordering InformationExtended Type Number Package RemarksATA6622-PGPW QFN20 3.3V LI

Pagina 21

284986F–AUTO–07/08ATA6622/ATA6624/ATA662611. Revision HistoryPlease note that the following page numbers referred to in this section refer to the spec

Pagina 22

4986F–AUTO–07/08Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel Asia

Pagina 23

34986F–AUTO–07/08ATA6622/ATA6624/ATA66262. Pin ConfigurationFigure 2-1. Pinning QFN20 67 8 10920 19 18QFN 5 mm × 5 mm0.65 mm pitch20 leadATA6622/24/26

Pagina 24

44986F–AUTO–07/08ATA6622/ATA6624/ATA66263. Functional Description3.1 Physical Layer CompatibilitySince the LIN physical layer is independent from high

Pagina 25

54986F–AUTO–07/08ATA6622/ATA6624/ATA66263.7 Input/Output Pin (TXD)In Normal Mode the TXD pin is the microcontroller interface used to control the stat

Pagina 26

64986F–AUTO–07/08ATA6622/ATA6624/ATA66263.13 TM Input PinThe TM pin is used for final production measurements at Atmel®. In normal application, it has

Pagina 27

74986F–AUTO–07/08ATA6622/ATA6624/ATA66264. Modes of OperationFigure 4-1. Modes of Operation 4.1 Normal ModeThis is the normal transmitting and receivi

Pagina 28

84986F–AUTO–07/08ATA6622/ATA6624/ATA6626A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LINreceiver.Figure

Pagina 29

94986F–AUTO–07/08ATA6622/ATA6624/ATA6626Figure 4-3. LIN Wake Up from Silent Mode 4.3 Sleep ModeA falling edge at EN when TXD is low switches the IC in

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