Rainbow-electronics ATA6624 Manual de usuario descargar pdf (Pagina 16)

4986F–AUTO–07/08

ATA6622/ATA6624/ATA6626

Figure 6-1. Timing Sequence with R

WD_OSC

= 51 kΩ

6.2 Worst Case Calculation with R

WD_OSC

= 51 kΩ

The internal oscillator has a tolerance of 20%. This means that t

and t

can also vary by 20%.

The worst case calculation for the watchdog period t

is calculated as follows.

The ideal watchdog time t

is between the maximum t

and the minimum t

plus the minimum

1,min

= 0.8 × t

= 16.5 ms, t

1,max

= 1.2 × t

= 24.8 ms

2,min

= 0.8 × t

= 17.3 ms, t

2,max

= 1.2 × t

= 26 ms

wdmax

= t

1min

+ t

2min

= 16.5 ms + 17.3 ms = 33.8 ms

wdmin

= t

1max

= 24.8 ms

= 29.3 ms ±4.5 ms (±15%)

A microcontroller with an oscillator tolerance of ±15% is sufficient to supply the trigger inputs

correctly.

nres

= 4 ms

Undervoltage Reset Watchdog Reset

reset

= 4 ms

trig

> 200 ns

= 20.6 ms t

= 21 ms

= 155 ms

VCC

3.3V/5V

NTRIG

NRES

Table 6-1. Typical Watchdog Timings

WD_OSC

kΩ

Oscillator

Period

osc

/µs

Lead

Time

/ms

Closed

Window

/ms

Open Window

/ms

Trigger Period from

Microcontroller

/ms

Reset Time

nres

/ms

34 13.3 105 14.0 14.7 19.9 4

51 19.61 154.8 20.64 21.67 29.32 4

91 33.54 264.80 35.32 37.06 50.14 4

120 42.84 338.22 45.11 47.34 64.05 4

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 28 29

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