MAX5302
Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
_______________________________________________________________________________________ 3
(Note 3)
CS = V
DD
, DIN = 100kHz
Rail-to-rail (Note 2)
To ±1/2LSB, V
STEP
= 2.5V
CONDITIONS
mA0.28 0.4I
DD
Supply Current
V4.5 5.5V
DD
Supply Voltage
nVs5Digital Feedthrough
µs20Start-Up Time
µA0.001 ±0.1Current into FB
V0 to V
DD
Output Voltage Swing
µs14Output Settling Time
V/µs0.6SRVoltage Output Slew Rate
UNITSMIN TYP MAXSYMBOLPARAMETER
(Note 3) µA420Supply Current in Shutdown
µA0.001 ±0.5Reference Current in Shutdown
ns40t
CH
SCLK Pulse Width High
ns100t
CP
SCLK Clock Period
ns40t
CSS
CS Fall to SCLK Rise Setup Time
ns40t
DS
DIN Setup Time
ns0t
CSH
SCLK Rise to CS Rise Hold Time
ns40t
CL
SCLK Pulse Width Low
ns40t
CS1
CS Rise to SCLK Rise Hold Time
ns100t
CSW
CS Pulse Width High
ns40t
CS0
SCLK Rise to CS Fall Delay
ns0t
DH
DIN Hold Time
Note 1: Guaranteed from code 11 to code 4095 in unity-gain configuration.
Note 2: Accuracy is better than 1LSB for V
OUT
= 8mV to (V
DD
- 100mV), guaranteed by a power-supply rejection test at the end
points.
Note 3: R
L
= ∞, digital inputs at GND or V
DD
.
DIGITAL INPUTSDYNAMIC PERFORMANCE
POWER SUPPLIES
TIMING CHARACTERISTICS (Figure 6)
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 8, V
DD
= +5V ±10%, V
REF
= +2.5V, R
L
= 5kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical val-
ues are at T
A
= +25°C. Output buffer connected in unity-gain configuration.)
Comentarios a estos manuales