
AND A,[m] Logical AND accumulator with data memory
Description Data in the accumulator and the specified data memory perform a bitwise logical_AND op
-
eration. The result is stored in the accumulator.
Operation
ACC ¬ ACC ²AND² [m]
Affected flag(s)
TC2 TC1 TO PD OV Z AC C
¾¾¾¾¾Ö¾¾
AND A,x Logical AND immediate data to the accumulator
Description Data in the accumulator and the specified data perform a bitwise logical_AND operation.
The result is stored in the accumulator.
Operation
ACC ¬ ACC ²AND² x
Affected flag(s)
TC2 TC1 TO PD OV Z AC C
¾¾¾¾¾Ö¾¾
ANDM A,[m] Logical AND data memory with the accumulator
Description Data in the specified data memory and the accumulator perform a bitwise logical_AND op
-
eration. The result is stored in the data memory.
Operation
[m] ¬ ACC ²AND² [m]
Affected flag(s)
TC2 TC1 TO PD OV Z AC C
¾¾¾¾¾Ö¾¾
CALL addr Subroutine call
Description The instruction unconditionally calls a subroutine located at the indicated address. The
program counter increments once to obtain the address of the next instruction, and pushes
this onto the stack. The indicated address is then loaded. Program execution continues
with the instruction at this address.
Operation
Stack ¬ PC+1
PC ¬ addr
Affected flag(s)
TC2 TC1 TO PD OV Z AC C
¾¾¾¾¾¾¾¾
CLR [m] Clear data memory
Description The contents of the specified data memory are cleared to 0.
Operation
[m] ¬ 00H
Affected flag(s)
TC2 TC1 TO PD OV Z AC C
¾¾¾¾¾¾¾¾
HT49R70A-1
Rev. 1.00 29 December 4, 2001
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