
39
ATtiny26(L)
1477B–AVR–04/02
Notes: 1. Each line represents a bit or fuse combination which enables the function.
2. A fuse value of “0” is programmed, “1” is unprogrammed.
MCU Control Register –
MCUCR
The MCU Control Register contains control bits for general MCU functions.
• Bits 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny26/L and always reads as zero.
• Bit 6 – PUD: Pull-up Disable
When this bit is set (one), the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
“Configuring the Pin” on page 91 for more details about this feature.
• Bit 5 – SE: Sleep Enable
The SE bit must be set (one) to make the MCU enter the Sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the Sleep mode unless it is the pro-
grammers purpose, it is recommended to set the Sleep Enable SE bit just before the
execution of the SLEEP instruction.
• Bits 4,3 – SM1/SM0: Sleep Mode Select Bits 1 and 0
These bits select between the four available Sleep modes, as shown in the following
table.
For details, refer to the paragraph “Sleep Modes” below.
• Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny26/L and always reads as zero.
PB4 XTAL1, clock source FUSE[PLLCK,CKSEL]
FUSE[PLLCK,CKSEL]
10000
10101-11111
PB5 XTAL2, clock source FUSE[PLLCK,CKSEL] 11001-11111
PB6 External interrupt
TC0 clock
GIMSK[INT0],MCUCR[ISC01,ISC01]
TCCR0[CS02,CS01]
100
11
PB7 RESET RSTDISBL FUSE 1
Table 17. Alternative Functions (Continued)
Pin Alternate Function
Control Register[Bit Name] which
set the Alternate Function
(1)
Bit or Fuse
Value
(2)
Bit 76543210
$35 ($55) – PUD SE SM1 SM0 – ISC01 ISC00 MCUCR
Read/Write R R/W R/W R/W R/W R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 18. Sleep Modes
SM1 SM0 Sleep Mode
0 0 Idle mode
0 1 ADC Noise Reduction mode
1 0 Power-down mode
1 1 Standby mode
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