Rainbow-electronics ATmega163L Manual de usuario descargar pdf (Pagina 69)

ATmega163(L)

Figure 51. Block diagram of the 2-Wire Serial Interface

The CPU interfaces with the 2-wire Serial Interface via the following five I/O registers: the 2-wire Serial Interface Bit Rate

Register (TWBR), the 2-wire Serial Interface Control Register (TWCR), the 2-wire Serial Interface Status Register (TWSR),

the 2-wire Serial Interface Data Register (TWDR), and the 2-wire Serial Interface Address Register (TWAR, used in slave

mode).

The 2-wire Serial Interface Bit Rate Register - TWBR

•

Bits 7..0 - 2-wire Serial Interface Bit Rate Register

TWBR selects the division factor for the bit rate generator. The bit rate generator is a frequency divider which generates the

SCL clock frequency in the master modes according to the following equation

• Bit Rate = SCL frequency

• f

= CPU Clock frequency

• TWBR = Contents of the 2-wire Serial Interface Bit Rate Register

• t

= Bus alignment adjustion

Bit 76543210

$00 ($20) TWBR7 TWBR6 TWBR5 TWBR4 TWBR3 TWBR2 TWBR1 TWBR0 TWBR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial value 00000000

ACK

INPUT

OUTPUT

INPUT

OUTPUT

START/STOP

AND SYNC

ARBITRATION

TIMING

AND

CONTROL

SERIAL CLOCK

GENERATOR

STATE MACHINE

AND

STATUS DECODER

DATA SHIFT

ADDRESS REGISTER

AND

COMPARATOR

TWAR

SDA

SCL

TWDR

CONTROL

STATUS

TWCR

TWSR

AVR 8-BIT DATA BUS

Bit Rate

16 2(TWBR) + t

-----------------------------------------------------------=

1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 155 156

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Rainbow-electronics ATmega163L Manual de usuario Pagina 69

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