Rainbow-electronics ATmega103L Manual de usuario descargar pdf (Pagina 50)

ATmega603/103

Figure 35. Effects on Unsynchronized OCR1 Latching

During the time between the write and the latch operation, a read from OCR1A or OCR1B will read the contents of the tem-

porary location. This means that the most recently written value always will read out of OCR1A/B

When the OCR1A/OCR1B contains $0000 or TOP, the output OC1A/OC1B is updated to low or high on the next compare

match according to the settings of COM1A1/COM1A0 or COM1B1/COM1B0. This is shown in Table 21.

Note: X = A or B

In PWM mode, the Timer Overflow Flag1, TOV1, is set when the counter advances from $0000. Timer Overflow Interrupt1

operates exactly as in normal Timer/Counter mode, i.e. it is executed when TOV1 is set provided that Timer Overflow

Interrupt1 and global interrupts are enabled. This does also apply to the Timer Output Compare1 flags and interrupts.

Table 21. PWM Outputs OCR1X = $0000 Or TOP

COM1X1 COM1X0 OCR1X Output OC1X

1 0 $0000 L

10TOP H

1 1 $0000 H

11TOP L

Counter

alue

Compare V

alue

PWM

Output OC1X

Synchronized OCR1X Latch

Counter

Value

Compare Value

PWM Output OC1X

Unsynchronized OCR1X Latch

Glitch

Compare Value changes

Note: X = A or B

Compare V

alue changes

1 2 ... 45 46 47 48 49 50 51 52 53 54 55 ... 125 126

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Rainbow-electronics ATmega103L Manual de usuario Pagina 50