Rainbow-electronics ATtiny43U Manual de usuario descargar pdf (Pagina 94)

8048B–AVR–03/09

ATtiny43U

However, for ensuring compatibility with future devices, this bit must be set to zero when

TCCR0B is written when operating in PWM mode. When writing a logical one to the FOCnB bit,

an immediate Compare Match is forced on the Waveform Generation unit. The OCnB output is

changed according to its COMnB1:0 bits setting. Note that the FOCnB bit is implemented as a

strobe. Therefore it is the value present in the COMnB1:0 bits that determines the effect of the

forced compare.

A FOCnB strobe will not generate any interrupt, nor will it clear the timer in CTC mode using

OCRnB as TOP.

The FOCnB bit is always read as zero.

• Bits 5, 4 – Res: Reserved Bits

These bits are reserved and will always read zero.

• Bit 3 – WGMn2: Waveform Generation Mode

See the description in the “Register Description” on page 90.

• Bits 2:0 – CSn[2:0]: Clock Select

The three Clock Select bits select the clock source to be used by the Timer/Counter.

If external pin modes are used for the Timer/Countern, transitions on the Tn pin will clock the

counter even if the pin is configured as an output. This feature allows software control of the

counting.

12.9.5 TCNT0 – Timer/Counter Register

Table 12-9. Clock Select Bit Description

CSn2 CSn1 CSn0 Description

0 0 0 No clock source (Timer/Counter stopped)

001clk

I/O

/(No prescaling)

010clk

I/O

/8 (From prescaler)

011clk

I/O

/64 (From prescaler)

100clk

I/O

/256 (From prescaler)

101clk

I/O

/1024 (From prescaler)

1 1 0 External clock source on Tn pin. Clock on falling edge.

1 1 1 External clock source on Tn pin. Clock on rising edge.

Bit 76543210

0x32 (0x52) TCNT0[7:0] TCNT0

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 0 0

1 2 ... 89 90 91 92 93 94 95 96 97 98 99 ... 181 182

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