1 of 21 080902FEATURES§ 4096 bits Electrically Erasable ProgrammableRead-Only Memory (EEPROM)§ Unique, factory-lasered and tested 64-bitregistration
DS243310 of 21MEMORY FUNCTION EXAMPLEExample: Write two data bytes to memory location 0026 and 0027. Read entire memory.MASTER MODE DATA (LSB FIRST)
DS243311 of 21Figure 8. HARDWARE CONFIGURATION*5kW is adequate for reading the DS2433. To write to a single device, a 2.2kW resistor and VPUP of atle
DS243312 of 21INITIALIZATIONAll transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequenceconsists of a Reset
DS243313 of 21command has to occur at Overdrive Speed until a Reset Pulse of minimum 480ms duration resets alldevices on the bus to regular speed (OD
DS243314 of 21Figure 9. ROM FUNCTIONS FLOW CHART (first part)
DS243315 of 21Figure 9. ROM FUNCTIONS FLOW CHART (continued)
DS243316 of 211-WIRE SIGNALINGThe DS2433 requires strict protocols to insure data integrity. The protocol consists of four types ofsignaling on one l
DS243317 of 21Figure 11. READ/WRITE TIMING DIAGRAMWrite-one Time SlotWrite-zero Time SlotRead-data Time Slot
DS243318 of 21CRC GENERATIONWith the DS2433 there are two different types of CRCs (Cyclic Redundancy Checks). One CRC is an 8-bit type and is stored
DS243319 of 21ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -0.5V to +7.0VOperating Temperature Range -40°C to +85°CStorage Tempera
DS24332 of 21number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (23h) plus4096 bits of user-programmable EEPR
DS243320 of 21AC ELECTRICAL CHARACTERISTICSOVERDRIVE SPEED (VPUP = 2.8V to 6.0V;-40°C to +85°C)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESTime Slot tS
DS243321 of 21the pullup resistor to recover to a high level. For a read-zero time slot, it ensures that a read will occurbefore the fastest device(s
DS24333 of 21Figure 1. DS2433 BLOCK DIAGRAM64-BIT LASERED ROMEach DS2433 contains a unique ROM code that is 64 bits long. The first eight bits are a
DS24334 of 21bytes. The corresponding ending offset in this example is 1FH. For best economy of speed and efficiency,the target address for writing s
DS24335 of 21Figure 2. HIERARCHCAL STRUCTURE FOR 1-WIRE PROTOCOLFigure 3. 64-BIT LASERED ROMMSB LSB8-Bit CRC Code 48-Bit Serial Number 8-Bit Family C
DS24336 of 21writing data. Only full data bytes are accepted. If the last data byte is incomplete its content will beignored and the partial byte fla
DS24337 of 21Figure 6. ADDRESS REGISTERREAD MEMORY [F0H]The read memory command may be used to read the entire memory. After issuing the command, the
DS24338 of 21Figure 7. MEMORY FUNCTION FLOW CHART
DS24339 of 21Figure 7. MEMORY FUNCTION FLOW CHART (continued)
Comentarios a estos manuales