
DS2405
13 of 15
READ/WRITE TIMING DIAGRAM Figure 6 (cont.)
Read-Data Time Slot
60ms £ t
SLOT
< 120ms
1ms £ t
LOWR
< 15ms
0 £ t
RELEASE
< 45ms
1ms £ t
REC
< ¥
t
RDV
= 15ms
t
SU
< 1ms
CRC GENERATION
To validate the data transmitted from the DS2405, the bus master may generate a CRC value from the
data as it is received. This generated value is compared to the value stored in the last 8 bits of the
DS2405. If the two CRC values match, the transmission is error-free.
The equivalent polynomial function of this CRC is:
CRC = x
8
+ x
5
+ x
4
+ 1
For more details, see the Book of DS19xx iButton Standards.
RESISTOR
MASTER
DS2405
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