Rainbow-electronics DS1393 Manual de usuario descargar pdf (Pagina 18)

DS1390/DS1391/DS1392/DS1393

The user determines diode and resistor selection

according to the maximum current desired for battery

or super cap charging. The maximum charging current

can be calculated as illustrated in the following exam-

ple. Assume that a system power supply of 3.3V is

applied to V

and a super cap is connected to

BACKUP

. Also, assume that the trickle charger has

been enabled with a diode and resistor R2 between

and V

BACKUP

. The maximum current I

MAX

would

therefore be calculated as follows:

MAX

= (3.3V - diode drop) / R2 ≈ (3.3V - 0.7V) /

2kΩ≈1.3mA

As the super cap changes, the voltage drop between

and V

BACKUP

decreases and therefore the charge

current decreases.

Low-Voltage SPI/3-Wire RTCs with

Trickle Charger

18 ____________________________________________________________________

250Ω

2kΩ

4kΩ

BACKUP

BIT 7

BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

TCS3 TCS2 TCS1 TCS0 DS1 DS0 ROUT1 ROUT0

TRICKLE-CHARGE REGISTER (8Fh WRITE, 0Fh READ)

1 0F 16 SELECT

NOTE: ONLY 1010b ENABLES CHARGER

1 OF 2

SELECT

1 OF 3

SELECT

TCS

0-3

= TRICKLE-CHARGE SELECT

0-1

= DIODE SELECT

ROUT

0-1

= RESISTOR SELECT

Figure 9. DS1390/DS1391 Programmable Trickle Charger

SCLK WHEN CPOL = 0

SCLK WHEN CPOL = 1

DATA LATCH (WRITE/INTERNAL STROBE)

SHIFT DATA OUT (READ)

DATA LATCH (WRITE/INTERNAL STROBE)

SHIFT DATA OUT (READ)

NOTE 1:

CPHA BIT POLARITY (IF APPLICABLE) MAY NEED TO BE SET ACCORDINGLY.

NOTE 2:

CPOL IS A BIT SET IN THE MICROCONTROLLER'S CONTROL REGISTER.

NOTE 3:

SDO REMAINS AT HIGH IMPEDANCE UNTIL 8 BITS OF DATA ARE READY TO BE

SHIFTED OUT DURING A READ.

Figure 10. Serial Clock as a Function of Microcontroller Clock-

Polarity Bit

MODE

CSZ

SCLK SDI SDO

Disable

Input

Disabled

Input

Disabled

High

Impedance

CPOL* = 1,

SCLK Rising

Write

CPOL = 0,

SCLK Falling

Data Bit

Latch

High

Impedance

CPOL = 1,

SCLK Falling

Read

CPOL = 0,

SCLK Rising

Next Data

Bit Shift**

Table 6. SPI Pin Function

*CPOL is the clock-polarity bit set in the control register of the

host microprocessor.

**SDO remains at high impedance until 8 bits of data are ready to

be shifted out during a read.

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 24

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