Rainbow-electronics BR24L32FV-W Manual de usuario Pagina 1

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs1/254k×8 bit electrically erasable PROMBR24L32-W / BR24L32F-W / BR24L32FJ-WBR24L32

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs10/25zByte writeSDALINEWPSTARTSLAVEADDRESS10 01R/WWRITEACKACKD7DATAD0STOPFig.8 BY

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs11/25zCurrent readSDALINESTARTSLAVEADDRESS11R/WACKACKDATASTOP00A2 A1 A0D7 D0READFi

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs12/25zSequential readSTARTSLAVEADDRESSR/WACKACKACKACKREADDATA(n)DATA(n+x)SDALINE11

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs13/25zApplication1) WP effective timing WP is fixed to “H” or “L” usually. But

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs14/252) Software reset Please execute software reset in case that the device is

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs15/253) Acknowledge polling Since the device ignore all input commands during t

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs16/254) Command cancellation by start and stop condition During a command input

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs17/255) Notes for power supply VCC rises through the low voltage region in which

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs18/256) I / O circuit • Pull up resister of SDA pin The pull up resister is n

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs19/25 • The minimum value RPU The minimum value of RPU is determined by followin

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs2/25zRecommended operating conditions (Ta=25°C)Parameter Symbol Limits UnitSupply

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs20/258) Notes for noise on VCC • About bypass capacitor Noise and surges on p

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs21/25 • The maximum value of RS The maximum value of RS is determined by followi

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs22/2510) The special character DATA The following characteristic data are typ

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs23/2520.60.50.40.30.20.1001 34 65CURRENT CONSUMPTION AT READING : ICC2 (mA)Fig.2

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs24/2523001002000−100−20001 34 65INPUT DATA SET UP TIME : tSU:DAT (ns)Fig.35 I

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs25/2520.60.30.40.50.20.1001 34 65NOISE REDUCTION EFFECTIVE TIME : tI (SCL H) (µ

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs3/25zDimensionFig.1(a) PHYSICAL DIMENSION (Units : mm) DIP8 (BR24L32-W) 0.5±0.13

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs4/25zBlock diagram1A0A1 2A2 3GND 4VCC8WP76 SCLSDA532kbit EEPROM arrayControl logic

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs5/25zAC operating characteristics (Unless otherwise specified Ta=−40 to 85°C, VCC=

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs6/25zSynchronous data timingtBUFtPDtHIGH tHD : STA tLOWtFtRSCLSTART BIT STOP BITSC

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs7/25zWP timingSCLSDAWPtHD : WPtWRSTOP BITACKACKD1DATA (n)DATA (1)tSU : WPD0Fig.6(a

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs8/25zDevice operation1) Start condition (Recognition of start bit) • All commands

BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-WMemory ICs9/256) Acknowledge • Acknowledge is a software convention used to indicate success