Rainbow-electronics BR24L01AFVM-W Manual de usuario descargar pdf (Pagina 10)

BR24L01A-W / BR24L01AF-W / BR24L01AFJ-W /

Memory ICs

BR24L01AFV-W / BR24L01AFVM-W

10/25

Byte write

SDA

LINE

SLAVE

ADDRESS

10 01

DATA

Fig.8 BYTE WRITE CYCLE TIMING

WORD

ADDRESS

∗

A0A1A2

•

By using this command, the data is programmed into the indicated word address.

•

When the master generates a STOP condition, the device begins the internal write cycle to the nonvolatile memory

array.

Page write

Fig.9 PAGE WRITE CYCLE TIMING

SDA

LINE

SLAVE

ADDRESS

10 01

DATA (n)

DATA (n+7)

WORD

ADDRESS (n)

∗

A0A1A2

•

This device is capable of eight byte page write operation.

•

When two or more byte data are inputted, the three low order address bits are internally incremented by one after the

receipt of each word. The four higher order bits of the address (WA6 to WA3) remain constant.

•

If the master transmits more than eight words, prior to generating the STOP condition, the address counter will

“roll over”, and the previous transmitted data will be overwritten.

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Rainbow-electronics BR24L01AFVM-W Manual de usuario Pagina 10