1Features• Fast Read Access Time – 120 ns• Fast Byte Write – 200 µs or 1 ms• Self-timed Byte Write Cycle– Internal Address and Data Latches– Internal
AT28C64(X)10AT28C64X Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby150 30 0.1 AT28C64X-15JCAT28C64X-15PCAT28C
AT28C64(X)11Packaging Information.045(1.14) X 45˚PIN NO. 1IDENTIFY.025(.635) X 30˚ - 45˚.012(.305).008(.203).021(.533).013(.330).530(13.5).490(12.4).0
© Atmel Corporation 1999.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa
AT28C64(X)2The AT28C64 is accessed like a Static RAM for the read orwrite cycles without the need for external components. Dur-ing a byte write, the a
AT28C64(X)3Device OperationREAD: The AT28C64 is accessed like a Static RAM.When CE and OE are low and WE is high, the data storedat the memory locatio
AT28C64(X)4Notes: 1. X can be VIL or VIH.2. Refer to AC programming waveforms.3. VH = 12.0V ± 0.5V.DC and AC Operating RangeAT28C64-12 AT28C64-15 AT28
AT28C64(X)5AC Read Waveforms(1)(2)(3)(4)Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.2. OE may be
AT28C64(X)6AC Write WaveformsWE ControlledCE ControlledAC Write CharacteristicsSymbol Parameter Min Max UnitstAS, tOESAddress, OE Setup Time 10 nstAHA
AT28C64(X)7Notes: 1. These parameters are characterized and not 100% tested.2. See “AC Read Characteristics”.Data Polling WaveformsChip Erase Waveform
AT28C64(X)8
AT28C64(X)9AT28C64 Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby120 30 0.1 AT28C64(E)-12JCAT28C64(E)-12PCAT2
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