
6
AT24C01
0134E–SEEPR–08/02
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
Note: 1. The write cycle time t
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
SCL
SDA
WORD n
8th BIT ACK
STOP
CONDITION
START
CONDITION
t
WR
(1)
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