Rainbow-electronics AT83C24NDS Manual de usuario descargar pdf (Pagina 32)

4234F–SCR–10/05

AT83C24

Rise and Fall Slew rate

0.2

0.12 V/ns

CLASS A

CCLK from 0.5 to 4.2V

CLASS B

CCLK from 0.5 to 0.85 x

CVCC

Low level voltage stability

(taking into account PCB design)

-0.25 0.5 V CLASS A&B&C

High level voltage stability

(taking into account PCB design)

4.2

2.35

CVCC-0.4

CVCC+0.25

CVCC = CLASS A

CVCC = CLASS B

CLASS C

CCLK Smart card clock frequency 24 MHz C

= 30pF, CLK=48MHz

Table 23. Smart Card Clock (CCLK pin) (Continued)

Symbol Parameter Min Typ Max Unit Test Conditions

Table 24. Smart Card I/O (CIO, CC4, CC8 pins)

Symbol Parameter Min Typ Max Unit Test Conditions

Input Low-voltage -0.3V 0.8 V I

= 500 µA

Input Low Current 700 µA CVCC = CLASS A&B&C

Input High Voltage

0.6 x CVCC

0.7 x CVCC

CVCC

CVCC = CLASS A

CVCC = CLASS B & C

Input High Current -20 +20 μA

Output Low-voltage 0

0.45

0.3

= -1 mA CLASS A

= -1 mA CLASS B

= -1 mA CLASS C

Output High Voltage

0.75 x CVCC

0.9 x CVCC

CVCC

= 40 μA CLASS

A&B&C

= 0μA, CLASS A&B

Output Short Circuit Current -15 +15 mA Short to GND or CVCC

Low level voltage stability

(taking into account PCB design)

-0.25

0.6

0.4

CLASS A

CLASS B

CLASS C

High level voltage stability

(taking into account PCB design)

CVCC-0.5 CVCC+0.25 V CVCC = CLASS A&B&C

Output rise and fall time

0.1 μs

= 65 pF

CLASS A:

measurement between

0.6V and 70% of CVCC

CLASS B & C:

measurement between

0.4V and 70% of CVCC

Input rise and fall time 1 μs C

= 65 pF

1 2 ... 27 28 29 30 31 32 33 34 35 36 37 ... 41 42

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