Rainbow-electronics T89C51IC2 Manual de usuario Pagina 8

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T89C51IC2
Rev. C – 3-Dec-01
RST 10 4 I/O
Reset: A high on this pin for two machine cycles while the oscillator is running, resets
the device. An internal diffused resistor to V
SS
permits a power-on reset using only an
external capacitor to V
CC
. This pin is an output when the hardware watchdog forces a
system reset.
ALE/PROG
33 27 O (I) Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for
external timing or clocking. Note that one ALE pulse is skipped during each access to
external data memory. This pin is also the program pulse input (PROG
) during Flash
programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE
will be inactive during internal fetches.
PSEN 32 26 O Program Strobe ENable: The read strobe to external program memory. When
executing code from the external program memory, PSEN
is activated twice each
machine cycle, except that two PSEN
activations are skipped during each access to
external data memory. PSEN
is not activated during fetches from internal program
memory.
EA 35 29 I External Access Enable: EA
must be externally held low to enable the device to fetch
code from external program memory locations 0000H to FFFFH (RD). If security level 1
is programmed, EA
will be internally latched on Reset.
Mnemonic
Pin Number
Type
Name and FunctionPLCC44 VQFP44 1.4
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