Detailed Description
The MAX5105/MAX5106 quad, 8-bit DACs feature an
internal, nonvolatile EEPROM, which stores the DAC
states for initialization during power-up. These devices
consist of four resistor string DACs, four rail-to-rail
buffers, a 14-bit shift register, oscillator, power-on reset
(POR) circuitry, and five volatile and five nonvolatile
memory registers (Functional Diagram). The shift regis-
ter decodes the control and address bits, routing the
data to the proper memory registers. Data can be writ-
ten to a selected volatile register, immediately updating
the DAC output, or can be written to a selected non-
volatile register for storage.
The five volatile registers retain data as long as the
device is enabled and powered. Once power is
removed or the device is shut down, the volatile regis-
ters are cleared. The nonvolatile registers retain data
even after power is removed. On power-up, the POR
circuitry and internal oscillator control the transfer of
data from the nonvolatile registers to the volatile regis-
ters, which automatically initializes the device upon
startup. Data can be read from the nonvolatile registers
through DOUT.
MAX5105/MAX5106
Nonvolatile, Quad, 8-Bit DACs
8 _______________________________________________________________________________________
Pin Description
Ready/Busy Open-Drain Output. Indicates the state of the nonvolatile memory.
DD.
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