Rainbow-electronics MAX15023 Manual de usuario Pagina 21

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MAX15023
Type III Compensation Network
(See Figure 5)
If the output capacitor used is a low-ESR tantalum or
ceramic type, the ESR-induced zero frequency is usual-
ly above the targeted zero crossover frequency (f
O
). In
this case, Type III compensation is recommended.
Type III compensation provides three poles and two
zeros at the following frequencies:
Two midband zeros (f
Z1
and f
Z2
) cancel the pair of
complex poles introduced by the LC filter:
f
P1
= 0
f
P1
introduces a pole at zero frequency (integrator) for
nulling DC output voltage errors:
Depending on the location of the ESR zero (f
ZO
), f
P2
can be used to cancel it, or to provide additional atten-
uation of the high-frequency output ripple:
f
P3
attenuates the high-frequency output ripple.
The locations of the zeros and poles should be such
that the phase margin peaks around f
O
.
Ensure that R
F
>>2/g
m
(1/g
m
(MIN) = 1/600µS = 1.67k)
and the parallel resistance of R
1
, R
2
, and R
I
is greater
than 1/g
m
. Otherwise, a 180° phase shift is introduced
to the response and will make it unstable.
The following procedure is recommended:
1) With R
F
10k, place the first zero (f
Z1
) at 0.5 x
f
PO
:
so:
2) The gain of the modulator (Gain
MOD
)—composed of
the regulator’s pulse-width modulator, LC filter,
feedback divider, and associated circuitry at
crossover frequency is:
The gain of the error amplifier (Gain
EA
) in midband fre-
quencies is:
The total loop gain as the product of the modulator gain
and the error amplifier gain at f
O
should be equal to 1.
So:
Therefore:
Solving for C
I
:
3) If f
PO
< f
O
< f
ZO
< f
SW
/2, the second pole (f
P2
)
should be used to cancel f
ZO
. This way, the Bode
plot of the loop gain plot does not flatten out soon
after the 0dB crossover, and maintains its
-20dB/decade slope up to 1/2 the switching frequen-
cy. This is likely to occur if the output capacitor is a
low-ESR tantalum or polymer. Then set:
f
P2
= f
ZO
If a ceramic capacitor is used, then the capacitor ESR
zero, f
ZO
, is likely to be located even above 1/2 the
switching frequency, that is, f
PO
< f
O
< f
SW
/2 < f
ZO
. In
this case, the frequency of the second pole (f
P2
) should
be placed high enough in order not to significantly
erode the phase margin at the crossover frequency. For
example, it can be set at 5 x f
O
, so that its contribution
to phase loss at the crossover frequency, f
O
, is only
about 11°:
f
P2
= 5 x f
O
Once f
P2
is known, calculate R
I
:
R
fC
I
PI
=
××
1
2
2
π
C
VfLC
VR
I
OSC O OUT OUT
IN F
=
××× ×
()
×
2π
V
V
fC L
fCR
IN
OSC
O OUT OUT
OIF
×
×× ×
× ××× =
1
2
21
2
()
π
π
Gain Gain
MOD EA
×=1
Gain f C R
EA O I F
= ×××2π
Gain
V
V
fL C
MOD
IN
OSC
O OUT OUT
×× ×
1
2
2
()π
C
Rf
F
FPO
=
×× ×
1
205π .
f
RC
f
Z
FF
PO1
1
2
05=
××
π
.
f
R
CC
CC
P
F
FCF
FCF
3
1
2
=
××
×
+
π
f
RC
P
II
2
1
2
=
××π
f
RC
f
CRR
Z
FF
Z
II
1
2
1
1
2
1
2
=
××
=
×× +
π
π ()
Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
______________________________________________________________________________________ 21
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