MAX1425
10-Bit, 20Msps ADC
14 ______________________________________________________________________________________
Bypassing and Board Layout
The MAX1425 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, using surface-mount devices
for minimum inductance. Bypass all analog voltages
(AV
DD
, REFIN, REFP, REFN, and CML) to AGND.
Bypass the digital supply (DV
DD
) to DGND. Multilayer
boards with separated ground and power planes pro-
duce the highest level of signal integrity. Route high-
speed digital signal traces away from sensitive analog
traces. Matching impedance, especially for the input
clock generator, may reduce reflections, thus providing
less jitter in the system. For optimum results, use low-
distortion complementary components such as the
MAX4108.
Figure 8. Using a Transformer for AC-Coupling
Figure 9. Single-Ended AC-Coupled Input Signal
N.C.
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