MAX1207
65Msps, 12-Bit ADC
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DOR is high impedance when the MAX1207 is in
power-down (PD = high). DOR enters a high-imped-
ance state within 10ns of the rising edge of PD and
becomes active within 10ns of PD’s falling edge.
Digital Output Data (D0–D11), Output Format (G/
T
)
The MAX1207 provides a 12-bit, parallel, tri-state out-
put bus. D0–D11 and DOR update on the falling edge
of DAV and are valid on the rising edge of DAV.
The MAX1207 output data format is either Gray code or
two’s complement, depending on the logic input G/T.
With G/T high, the output data format is Gray code.
With G/T low, the output data format is two’s comple-
ment. See Figure 8 for a binary-to-Gray and Gray-to-
binary code-conversion example.
The following equations, Table 2, Figure 6, and Figure 8
define the relationship between the digital output and
the analog input:
for Gray code (G/T = 1).
for two’s complement (G/T = 0).
where CODE
10
is the decimal equivalent of the digital
output code as shown in Table 2.
The digital outputs D0–D11 are high impedance when
the MAX1207 is in power-down (PD = high). D0–D11
go high impedance within 10ns of the rising edge of PD
and become active within 10ns of PD’s falling edge.
Keep the capacitive load on the MAX1207 digital out-
puts D0–D11 as low as possible (<15pF) to avoid large
digital currents feeding back into the analog portion of
the MAX1207 and degrading its dynamic performance.
The addition of external digital buffers on the digital out-
puts isolate the MAX1207 from heavy capacitive loads.
To improve the dynamic performance of the MAX1207,
add 220Ω resistors in series with the digital outputs
close to the MAX1207. Refer to the MAX1211 evaluation
kit schematic for an example of the digital outputs dri-
ving a digital buffer through 220Ω series resistors.
Power-Down Input (PD)
The MAX1207 has two power modes that are controlled
with the power-down digital input (PD). With PD low, the
MAX1207 is in its normal operating mode. With PD
high, the MAX1207 is in power-down mode.
The power-down mode allows the MAX1207 to efficient-
ly use power by transitioning to a low-power state when
conversions are not required. Additionally, the
MAX1207 parallel output bus goes high impedance in
power-down mode, allowing other devices on the bus
to be accessed.
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