Rainbow-electronics MAX109 Manual de usuario descargar pdf (Pagina 20)

MAX109

8-Bit, 2.2Gsps ADC with Track/Hold Amplifier

and 1:4 Demultiplexed LVDS Outputs

20 ______________________________________________________________________________________

CLKN

CLKP

ADC SAMPLE NUMBER

ADC SAMPLES ON THE RISING EDGE OF CLKP

PD1DDR

PD2DDR

DCON

DCOP

PORTA DATA

PORTB DATA

NOTE: THE LATENCY TO THE D PORT IS 7.5 CLOCK CYCLES, THE LATENCY TO THE C PORT IS 8.5 CLOCK CYCLES, THE LATENCY TO THE B

PORT IS 9.5 CLOCK CYCLES, AND THE LATENCY TO THE A PORT IS 10.5 CLOCK CYCLES. ALL DATA PORTS (PORTA, PORTB, PORTC, AND

PORTD) ARE UPDATED ON THE RISING EDGE OF THE DCOP CLOCK.

PORTC DATA

PORTD DATA

SAMPLE HERE

N N + 1 N + 2 N + 3 N + 4 N + 5

N + 4N

N + 6

N + 3

N + 5

N + 8

N + 7

N + 1

N + 2

N + 6 N + 7 N + 8 N + 9 N + 10 N + 11 N + 12 N + 13 N + 14 N + 15 N + 16 N + 17 N + 18 N + 19

Figure 7. Timing Diagram for DDR Mode, f

CLK

/ 8 Mode