Rainbow-electronics AT89C51SND1C Manual de usuario descargar pdf (Pagina 125)

125

AT8xC51SND1C

4109E–8051–06/03

Registers Table 112. MMCON0 Register

MMCON0 (S:E4h) – MMC Control Register 0

Reset Value = 0000 0000b

76543210

DRPTR DTPTR CRPTR CTPTR MBLOCK DFMT RFMT CRCDIS

Bit

Number

Bit

Mnemonic Description

7 DRPTR

Data Receive Pointer Reset Bit

Set to reset the read pointer of the data FIFO.

Clear to release the read pointer of the data FIFO.

6 DTPTR

Data Transmit Pointer Reset Bit

Set to reset the write pointer of the data FIFO.

Clear to release the write pointer of the data FIFO.

5 CRPTR

Command Receive Pointer Reset Bit

Set to reset the read pointer of the receive command FIFO.

Clear to release the read pointer of the receive command FIFO.

4 CTPTR

Command Transmit Pointer Reset Bit

Set to reset the write pointer of the transmit command FIFO.

Clear to release the read pointer of the transmit command FIFO.

3MBLOCK

Multi-block Enable Bit

Set to select multi-block data format.

Clear to select single block data format.

2DFMT

Data Format Bit

Set to select the block-oriented data format.

Clear to select the stream data format.

1RFMT

Response Format Bit

Set to select the 48-bit response format.

Clear to select the 136-bit response format.

0 CRCDIS

CRC7 Disable Bit

Set to disable the CRC7 computation when receiving a response.

Clear to enable the CRC7 computation when receiving a response.

1 2 ... 120 121 122 123 124 125 126 127 128 129 130 ... 209 210

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