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TL/H/10554
ADC1241 Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-Hold
November 1994
ADC1241 Self-Calibrating 12-Bit Plus
Sign mP-Compatible A/D Converter
with Sample-and-Hold
General Description
The ADC1241 is a CMOS 12-bit plus sign successive ap-
proximation analog-to-digital converter. On request, the
ADC1241 goes through a self-calibration cycle that adjusts
positive linearity and full-scale errors to less than
g
(/2 LSB
each and zero error to less than
g
1 LSB. The ADC1241
also has the ability to go through an Auto-Zero cycle that
corrects the zero error during every conversion.
The analog input to the ADC1241 is tracked and held by the
internal circuitry, and therefore does not require an external
sample-and-hold. A unipolar analog input voltage range (0V
to
a
5V) or a bipolar range (
b
5V to
a
5V) can be accom-
modated with
g
5V supplies.
The 13-bit word on the outputs of the ADC1241 gives a 2’s
complement representation of negative numbers. The digi-
tal inputs and outputs are compatible with TTL or CMOS
logic levels.
Applications
Y
Digital Signal Processing
Y
High Resolution Process Control
Y
Instrumentation
Key Specifications
Y
Resolution 12 Bits plus Sign
Y
Conversion Time 13.8ms (max)
Y
Linearity Error
g
(/2 LSB (
g
0.0122%) (max)
Y
Zero Error
g
1LSB (max)
Y
Positive Full Scale Error
g
1LSB (max)
Y
Power Consumption 70mW (max)
Features
Y
Self-calibrating
Y
Internal sample-and-hold
Y
Bipolar input range with
g
5V supplies and single
a
5V reference
Y
No missing codes over temperature
Y
TTL/MOS input/output compatible
Y
Standard 28-pin DIP
TRI-STATE
É
is a registered trademark of National Semiconductor Corporation.
Simplified Schematic
TL/H/105541
Connection Diagram
Dual-In-Line Package
TL/H/105542
Top View
Order Number ADC1241CMJ,
ADC1241CMJ/883, ADC1241BIJ or
ADC1241CIJ
See NS Package Number J28A
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
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Indice de contenidos

Pagina 1 - TL/H/10554–2

TL/H/10554ADC1241 Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-HoldNovember 1994ADC1241 Self-Calibrating 12-Bit PlusS

Pagina 2

1.0 Pin DescriptionsDVCC(28),The digital and analog positive power supplyAVCC(4)pins. The digital and analog power supplyvoltage range of the ADC1241

Pagina 3

2.0 Functional Description (Continued)Digital Control InputsA/D FunctionCS WR RD CAL AZßß 1 1 1 Start Conversion without Auto-Zeroß 1 ß 1 1 Read Conve

Pagina 4 - AC Electrical Characteristics

3.0 Analog Considerations (Continued)TL/H/10554–18FIGURE 3. Analog Input Equivalent CircuitFor absolute accuracy, where the analog input varies be-twe

Pagina 5 - (Continued)

4.0 Dynamic PerformanceMany applications require the A/D converter to digitize acsignals, but the standard dc integral and differential nonlin-earity

Pagina 6 - TL/H/10554–8

ADC1241 Self-Calibrating 12-Bit Plus Sign mP-Compatible A/D Converter with Sample-and-HoldPhysical Dimensions inches (millimeters)Order Number ADC1241

Pagina 7 - TL/H/10554–21

Absolute Maximum Ratings (Notes1&2)If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Dist

Pagina 8 - Timing Diagrams

Digital and DC Electrical CharacteristicsThe following specifications apply for VCCeDVCCeAVCCea5.0V, Vbeb5.0V, VREFea5.0V, and fCLKe2.0 MHzunless othe

Pagina 9 - Timing Diagrams (Continued)

AC Electrical CharacteristicsThe following specifications apply for DVCCeAVCCea5.0V, Vbeb5.0V, tretfe20 ns unless otherwise specified.Boldface limits

Pagina 10 - 2.0 Functional Description

AC Electrical Characteristics (Continued)Note 7: A diode exists between AVCCand DVCCas shown below.TL/H/10554–4To guarantee accuracy, it is required t

Pagina 11 - Figure 2

AC Electrical Characteristics (Continued)TL/H/10554–6FIGURE 1b. Simplified Error Curve vs Output Code Without Auto-Cal or Auto-Zero CyclesTL/H/10554–7

Pagina 12 - Figure 3

Typical Performance Characteristics (Continued)Linearity Error vs VREFFrequencyLinearity Error vs ClockAmbient TemperatureFull Scale Error Change vsIn

Pagina 13 - 4.0 Dynamic Performance

Test CircuitsTL/H/10554–9TL/H/10554–11TL/H/10554–10TL/H/10554–12FIGURE 2. TRI-STATE Test Circuits and WaveformsTiming DiagramsAuto-Cal Cycle (CSe1, WR

Pagina 14

Timing Diagrams (Continued)Normal Conversion with Auto-Zero (CALe1, AZe0)TL/H/10554–14Normal Conversion without Auto-Zero (CALe1, AZe1)TL/H/10554–159

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