1 of 20 REV: 030603 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple rev
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 10 of 20 Figure 8. Block Diagram Figure 9. Typical Crystal Layout
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 11 of 20 DETAILED DESCRIPTION The RTC registers are double buffered into an internal and external set.
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 12 of 20 DATA RETENTION MODE The DS1501/DS1511 are fully accessible, and data can be written and read
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 13 of 20 The third method of reading the time and date uses the alarm function. The alarm can be confi
DS1501/DS1511 Y2K Watchdog Real-Time Clock 14 of 20 USING THE CLOCK ALARM The alarm settings and control reside within registers 08h to 0Bh (Table
DS1501/DS1511 Y2K Watchdog Real-Time Clock 15 of 20 Control A Register (0Eh) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BLF1 BLF2 PRS
DS1501/DS1511 Y2K Watchdog Real-Time Clock 16 of 20 Control B Register (0Fh) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TE CS BME TPE T
DS1501/DS1511 Y2K Watchdog Real-Time Clock 17 of 20 regardless of the state of the watchdog enable (WDE) bit, to serve as an indication to the proc
DS1501/DS1511 Y2K Watchdog Real-Time Clock 18 of 20 The interrupt flag bit (either TDF or KSF) associated with the attempted power-on sequence rema
DS1501/DS1511 Y2K Watchdog Real-Time Clock 19 of 20 WE only when register 13h is being accessed (Figure 4). The address pointer wraps around after
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 2 of 20 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.5V to +6.0VOperating
DS1501/DS1511 Y2K Watchdog Real-Time Clock 20 of 20 TYPICAL OPERATING CIRCUITS PACKAGE INFORMATION (For the
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 3 of 20 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Battery Leakage Current ILKG 100 nA DC E
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 4 of 20 AC OPERATING CHARACTERISTICS (VCC = 3.3V ±10%, TA = 0°C to +70°C; VCC = 3.3V ±10%, TA = -40°C
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 5 of 20 Figure 2. Write Cycle Timing, Write-Enable-Controlled Figure 3. Write Cycl
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 6 of 20 Figure 4. Burst Mode Timing Waveform A0–A4DQ0–DQ7 OE, WE, OR CE 13h PWHIGH PWLOW POWER-UP/DO
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 7 of 20 Figure 5. 3.3V Power-Up/Down Waveform Timing Figure 6. 5V Power-Up/Down Waveform Timing
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 8 of 20 WAKEUP/KICKSTART TIMING (TA = +25°C) (Figure 7) PARAMETER SYMBOL CONDITIONSMIN TYP MAX UNITS K
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks 9 of 20 PIN DESCRIPTION PIN DIP, SO MODULE TSOP NAME FUNCTION 1 1 8 PWR Power-On Output (Open Drain)
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